> On 29 Jul 2025, at 18:41, Richard Sandiford <richard.sandif...@arm.com> wrote:
>
> This patch continues the work of making ACLE intrinsics use VNx16BI
> for svbool_t results. It deals with the svunpk* intrinsics.
>
LGTM.
Thanks,
Kyrill
> gcc/
> * config/aarch64/aarch64-sve.md (@aarch64_sve_punpk<perm_hilo>_acle)
> (*aarch64_sve_punpk<perm_hilo>_acle): New patterns.
> * config/aarch64/aarch64-sve-builtins-base.cc
> (svunpk_impl::expand): Use them for boolean svunpk*.
>
> gcc/testsuite/
> * gcc.target/aarch64/sve/acle/general/unpkhi_1.c: New test.
> * gcc.target/aarch64/sve/acle/general/unpklo_1.c: Likewise.
> ---
> .../aarch64/aarch64-sve-builtins-base.cc | 2 +-
> gcc/config/aarch64/aarch64-sve.md | 28 +++++++++++++++++++
> .../aarch64/sve/acle/general/unpkhi_1.c | 24 ++++++++++++++++
> .../aarch64/sve/acle/general/unpklo_1.c | 24 ++++++++++++++++
> 4 files changed, 77 insertions(+), 1 deletion(-)
> create mode 100644
> gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpkhi_1.c
> create mode 100644
> gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpklo_1.c
>
> diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
> b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
> index 0d871a10898..d484bb28afa 100644
> --- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
> +++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
> @@ -3252,7 +3252,7 @@ public:
> unsigned int unpacks = m_high_p ? UNSPEC_UNPACKSHI : UNSPEC_UNPACKSLO;
> insn_code icode;
> if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL)
> - icode = code_for_aarch64_sve_punpk (unpacku, mode);
> + icode = code_for_aarch64_sve_punpk_acle (unpacku);
> else
> {
> int unspec = e.type_suffix (0).unsigned_p ? unpacku : unpacks;
> diff --git a/gcc/config/aarch64/aarch64-sve.md
> b/gcc/config/aarch64/aarch64-sve.md
> index 13cab47243c..766d050b636 100644
> --- a/gcc/config/aarch64/aarch64-sve.md
> +++ b/gcc/config/aarch64/aarch64-sve.md
> @@ -10574,6 +10574,34 @@ (define_insn "@aarch64_sve_punpk<perm_hilo>_<mode>"
> "punpk<perm_hilo>\t%0.h, %1.b"
> )
>
> +(define_expand "@aarch64_sve_punpk<perm_hilo>_acle"
> + [(set (match_operand:VNx16BI 0 "register_operand" "=Upa")
> + (and:VNx16BI
> + (subreg:VNx16BI
> + (unspec:VNx8BI
> + [(match_operand:VNx16BI 1 "register_operand" "Upa")]
> + UNPACK_UNSIGNED)
> + 0)
> + (match_dup 2)))]
> + "TARGET_SVE"
> + {
> + operands[2] = aarch64_ptrue_all (2);
> + }
> +)
> +
> +(define_insn "*aarch64_sve_punpk<perm_hilo>_acle"
> + [(set (match_operand:VNx16BI 0 "register_operand" "=Upa")
> + (and:VNx16BI
> + (subreg:VNx16BI
> + (unspec:VNx8BI
> + [(match_operand:VNx16BI 1 "register_operand" "Upa")]
> + UNPACK_UNSIGNED)
> + 0)
> + (match_operand:VNx8BI 2 "aarch64_ptrue_all_operand")))]
> + "TARGET_SVE"
> + "punpk<perm_hilo>\t%0.h, %1.b"
> +)
> +
> ;; =========================================================================
> ;; == Vector partitioning
> ;; =========================================================================
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpkhi_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpkhi_1.c
> new file mode 100644
> index 00000000000..9c7b4bc7d4e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpkhi_1.c
> @@ -0,0 +1,24 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2" } */
> +
> +#include <arm_sve.h>
> +
> +svbool_t
> +test1 (svbool_t p)
> +{
> + return svand_z (svptrue_b8 (), svunpkhi (p), svptrue_b16 ());
> +}
> +
> +svbool_t
> +test2 (svbool_t p)
> +{
> + return svand_z (svptrue_b16 (), svunpkhi (p), svptrue_b8 ());
> +}
> +
> +svbool_t
> +test3 (svbool_t p)
> +{
> + return svand_z (svptrue_b16 (), svunpkhi (p), svptrue_b16 ());
> +}
> +
> +/* { dg-final { scan-assembler-not {\tand\t} } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpklo_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpklo_1.c
> new file mode 100644
> index 00000000000..f072a2ff7ef
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/unpklo_1.c
> @@ -0,0 +1,24 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2" } */
> +
> +#include <arm_sve.h>
> +
> +svbool_t
> +test1 (svbool_t p)
> +{
> + return svand_z (svptrue_b8 (), svunpklo (p), svptrue_b16 ());
> +}
> +
> +svbool_t
> +test2 (svbool_t p)
> +{
> + return svand_z (svptrue_b16 (), svunpklo (p), svptrue_b8 ());
> +}
> +
> +svbool_t
> +test3 (svbool_t p)
> +{
> + return svand_z (svptrue_b16 (), svunpklo (p), svptrue_b16 ());
> +}
> +
> +/* { dg-final { scan-assembler-not {\tand\t} } } */
> --
> 2.43.0
>
