Richard Henderson <richard.hender...@linaro.org> writes:
> Reject QI/HImode conditions, which would require extension in
> order to compare. Fixes
>
> z.c:10:1: error: unrecognizable insn:
> 10 | }
> | ^
> (insn 23 22 24 2 (set (reg:CC 66 cc)
> (compare:CC (reg:HI 128)
> (reg:HI 127))) "z.c":6:6 -1
> (nil))
> during RTL pass: vregs
>
> gcc:
> * config/aarch64/aarch64.md (mov<ALLI>cc): Accept MODE_CC
> conditions directly; reject QI/HImode conditions.
>
> gcc/testsuite:
> * gcc.target/aarch64/cmpbr-3.c: New.
> ---
> gcc/config/aarch64/aarch64.md | 16 +++++++++++-----
> gcc/testsuite/gcc.target/aarch64/cmpbr-3.c | 15 +++++++++++++++
> 2 files changed, 26 insertions(+), 5 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/aarch64/cmpbr-3.c
>
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index 8545c750282..4358cc59b0b 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -4752,15 +4752,21 @@
> (match_operand:ALLI 3 "register_operand")))]
> ""
> {
> - rtx ccreg;
> enum rtx_code code = GET_CODE (operands[1]);
> -
> if (code == UNEQ || code == LTGT)
> FAIL;
>
> - ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
> - XEXP (operands[1], 1));
> - operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
> + rtx ccreg = XEXP (operands[1], 0);
> + enum machine_mode ccmode = GET_MODE (ccreg);
> + if (GET_MODE_CLASS (ccmode) == MODE_CC)
> + gcc_assert (XEXP (operands[1], 1) == const0_rtx);
Sorry for the formatting nit, but: too much indentation.
LGTM otherwise.
Richard
> + else if (ccmode == QImode || ccmode == HImode)
> + FAIL;
> + else
> + {
> + ccreg = aarch64_gen_compare_reg (code, ccreg, XEXP (operands[1], 1));
> + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
> + }
> }
> )
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/cmpbr-3.c
> b/gcc/testsuite/gcc.target/aarch64/cmpbr-3.c
> new file mode 100644
> index 00000000000..a4f12deef27
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/cmpbr-3.c
> @@ -0,0 +1,15 @@
> +/* { dg-do assemble } */
> +/* { dg-options "-O2" } */
> +
> +#pragma GCC target "+cmpbr"
> +
> +long aarch64_fallback_frame_state_tpidr2_0;
> +unsigned short aarch64_fallback_frame_state_tpidr2_1,
> aarch64_fallback_frame_state_za_ctx_0;
> +void aarch64_fallback_frame_state_za_buffer()
> +{
> + long num_slices = aarch64_fallback_frame_state_tpidr2_1;
> + if (aarch64_fallback_frame_state_tpidr2_1 >
> aarch64_fallback_frame_state_za_ctx_0)
> + num_slices = aarch64_fallback_frame_state_za_ctx_0;
> + __builtin_memcpy((void *)aarch64_fallback_frame_state_tpidr2_0,
> + aarch64_fallback_frame_state_za_buffer, num_slices);
> +}
