Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64,
compile asm-hard-reg-4.c for x86 with -msse2 and scan x86
PR testsuite/121205
* gcc.dg/asm-hard-reg-4.c: Compile with -msse2 for x86 and scan
x86.
Signed-off-by: H.J. Lu <hjl.to...@gmail.com>
---
gcc/testsuite/gcc.dg/asm-hard-reg-4.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
b/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
index 0134bf0054c..b62b80c9dfe 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
@@ -1,4 +1,5 @@
-/* { dg-do compile { target aarch64*-*-* arm*-*-* powerpc*-*-* riscv*-*-*
s390*-*-* x86_64-*-* } } */
+/* { dg-do compile { target aarch64*-*-* arm*-*-* powerpc*-*-* riscv*-*-*
s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */
#if defined (__aarch64__)
# define FPR "{d5}"
@@ -16,9 +17,9 @@
#elif defined (__s390__)
# define FPR "{f5}"
/* { dg-final { scan-assembler-times "foo\t%f5" 4 { target { s390*-*-* } } } }
*/
-#elif defined (__x86_64__)
+#elif defined (__i386__) || defined (__x86_64__)
# define FPR "{xmm5}"
-/* { dg-final { scan-assembler-times "foo\t%xmm5" 4 { target { x86_64-*-* } }
} } */
+/* { dg-final { scan-assembler-times "foo\t%xmm5" 4 { target { i?86-*-*
x86_64-*-* } } } } */
#endif
float
--
2.50.1
