On Fri, Aug 29, 2025 at 3:55 AM Takayuki 'January June' Suwa <jjsuwa_sys3...@yahoo.co.jp> wrote: > > Only minor comment correction. No change in operation. > > -- >8 -- > > Also, the omission of the instruction that sets the shift amount register > (SAR) to 8 is now more efficient: it is omitted if there was a previous > bswapsi2 in the same BB, but not omitted if no bswapsi2 is found or another > insn that modifies SAR is found first (see below). > > Note that the five instructions for writing to SAR are as follows, along > with the insns that use them (except for bswapsi2_internal itself): > > - SSA8B > *shift_per_byte, *shlrd_per_byte > - SSA8L > *shift_per_byte, *shlrd_per_byte > - SSR > ashrsi3 (alt 1), lshrsi3 (alt 1), *shlrd_reg, rotrsi3 (alt 1) > - SSL > ashlsi3_internal (alt 1), *shlrd_reg, rotlsi3 (alt 1) > - SSAI > *shlrd_const, rotlsi3 (alt 0), rotrsi3 (alt 0) > > gcc/ChangeLog: > > * config/xtensa/xtensa-protos.h (xtensa_bswapsi2_output): > New function prototype. > * config/xtensa/xtensa.cc > (xtensa_bswapsi2_output_1, xtensa_bswapsi2_output): > New functions. > * config/xtensa/xtensa.md (bswapsi2_internal): > Rewrite in compact syntax and use xtensa_bswapsi2_output() as asm > output. > > gcc/testsuite/ChangeLog: > > * gcc.target/xtensa/bswap-SSAI8.c: New. > --- > gcc/config/xtensa/xtensa-protos.h | 1 + > gcc/config/xtensa/xtensa.cc | 88 +++++++++++++++++++ > gcc/config/xtensa/xtensa.md | 37 ++------ > gcc/testsuite/gcc.target/xtensa/bswap-SSAI8.c | 29 ++++++ > 4 files changed, 126 insertions(+), 29 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-SSAI8.c
Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max
