On 9/2/25 4:01 AM, Paul-Antoine Arras wrote:
Could you try to use the iterator to merge the pattern with vfmin_vf?
you can grep UNSPEC_VFMAXMIN and see the example in vector.md
I have attached an amended patch as you suggested. Here is the relevant
snippet:
(define_insn_and_split "*v<ieee_fmaxmin_op>_vf_<mode>"
[(set (match_operand:V_VLSF 0 "register_operand")
(unspec:V_VLSF [
(vec_duplicate:V_VLSF
(match_operand:<VEL> 2 "register_operand"))
(match_operand:V_VLSF 1 "register_operand")
] UNSPEC_VFMAXMIN))]
"TARGET_VECTOR && !HONOR_SNANS (<MODE>mode) && can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
{
riscv_vector::emit_vlmax_insn (code_for_pred_scalar
(<IEEE_FMAXMIN_OP>,
<MODE>mode),
riscv_vector::BINARY_OP, operands);
DONE;
}
[(set_attr "type" "vfminmax")]
)
(define_insn_and_split "*v<ieee_fmaxmin_op>_vf_<mode>"
[(set (match_operand:V_VLSF 0 "register_operand")
(unspec:V_VLSF [
(match_operand:V_VLSF 1 "register_operand")
(vec_duplicate:V_VLSF
(match_operand:<VEL> 2 "register_operand"))
] UNSPEC_VFMAXMIN))]
"TARGET_VECTOR && !HONOR_SNANS (<MODE>mode) && can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
{
riscv_vector::emit_vlmax_insn (code_for_pred_scalar
(<IEEE_FMAXMIN_OP>,
<MODE>mode),
riscv_vector::BINARY_OP, operands);
DONE;
}
[(set_attr "type" "vfminmax")]
)
These look fine. But the patchfile itself doesn't look like it got updated.
Assuming you update the patchfile to have patterns like you've shown
above and make the obvious comment fixes, then this is good to go.
jeff
