On 9/22/25 11:27 AM, Peter Bergner wrote:
The tt-ascalon-d8's pipeline description has reservations for 16-bit, 32-bit
and 64-bit vector integer divides, but was missing a reservation for 8-bit
vector integer divides, leading to an ICE. Add the missing reservation.
This was bootstrapped and regtested with no regressions.
Ok for trunk?
Peter
gcc/
PR target/121982
* config/riscv/tt-ascalon-d8.md (tt_ascalon_d8_vec_idiv_byte): New
define_insn_reservation.
gcc/testsuite/
PR target/121982
* gcc.target/riscv/pr121982.c: New test.
OK. Please install.
jeff
