On 10/3/25 7:04 AM, Zhongyao Chen wrote:
Improve RISC-V vector code generation by preferring tail-agnostic (ta) and
mask-agnostic (ma) policies for vector instructions when merge operands
are undefined. This optimization, controlled by a uarch-specific
`prefer_agnostic`
tuning parameter, reduces `vsetvl` instructions and avoids conservative
undisturbed policy selections, addressing PR target/118945.
Changes from v2:
- more detailed comment.
- refine the test to check for vsetvli ta/tu number explicitly.
PR target/118945
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_prefer_agnostic_p): New function.
(riscv_tune_param): Add prefer_agnostic member.
(various tune info structures): Initialize prefer_agnostic.
* config/riscv/riscv-protos.h (riscv_prefer_agnostic_p): Add
prototype.
* config/riscv/riscv-v.cc (get_prefer_tail_policy,
get_prefer_mask_policy): Use riscv_prefer_agnostic_p.
* config/riscv/riscv-vsetvl.cc (vsetvl_info::get_demand_flags):
demand policy for agnostic when prefer_agnostic is true.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/pr118945-1.c: New file.
* gcc.target/riscv/rvv/autovec/pr118945-2.c: New file.
THanks. I've pushed this to the trunk.
jeff
