Bump. Never got any response from ARM maintainers. Any general maintainers willing to merge?
Thanks, Matt > On 08/14/2025 6:29 PM EDT Matt Parks <[email protected]> wrote: > > > Ping; CCing all ARM maintainers. This patch (PR117468) and the other > (PR117366) have been good to go for some time now but need someone to > approve/commit. Both have test cases included and incorporated suggestions > from Christophe Lyon (thanks!). > > Thanks, > Matt > > On 07/21/2025 3:21 PM EDT Matt Parks <[email protected]> wrote: > > > > > > Bump. Regarding the formatting problems, I addressed this by attaching a > > patch file directly to the ticket > > (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117468) which avoids any > > e-mail formatting issues. I did the same for PR117366 > > (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117366). Please try the > > patches attached to the tickets if the prior e-mailed patches are not > > applying correctly. > > > > Matt > > > > > On 07/10/2025 4:23 PM EDT Christophe Lyon <[email protected]> > > > wrote: > > > > > > > > > Hi, > > > > > > Thanks for the update. > > > > > > There are still some formatting problems, some of which might be > > > caused by your mailer. > > > > > > I manually applied the patch and manually triggered CI, the new test > > > passed without regression. > > > > > > Here is the version I tested, let's wait for Richard's feedback. > > > > > > Christophe > > > > > > On Thu, 10 Jul 2025 at 01:27, Matt Parks <[email protected]> wrote: > > > > > > > > This patch fixes PR117468: > > > > ARM thumb1 compilation using -ffixed-reg with r4-r7, without -Os (which > > > > prohibits use of high registers), produces bad high register restoration > > > > code that clobbers the fixed register. > > > > > > > > gcc/ChangeLog: > > > > PR target/117468 > > > > * arm.cc (thumb1_prologue_unused_call_clobbered_lo_regs): Take > > > > fixed regs into account. > > > > * arm.cc (thumb1_epilogue_unused_call_clobbered_lo_regs): Take > > > > fixed regs into account. > > > > > > > > diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc > > > > index bde06f3fa86..de911981a5c 100644 > > > > --- a/gcc/config/arm/arm.cc > > > > +++ b/gcc/config/arm/arm.cc > > > > @@ -8274,7 +8274,8 @@ thumb1_prologue_unused_call_clobbered_lo_regs > > > > (void) > > > > bitmap prologue_live_out = df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN > > > > (cfun)); > > > > for (int reg = FIRST_LO_REGNUM; reg <= LAST_LO_REGNUM; reg++) > > > > - if (!callee_saved_reg_p (reg) && !REGNO_REG_SET_P > > > > (prologue_live_out, reg)) > > > > + if (!callee_saved_reg_p (reg) && !REGNO_REG_SET_P > > > > (prologue_live_out, reg) > > > > + && !fixed_regs[reg]) > > > > mask |= 1 << (reg - FIRST_LO_REGNUM); > > > > return mask; > > > > } > > > > @@ -8287,7 +8288,8 @@ thumb1_epilogue_unused_call_clobbered_lo_regs > > > > (void) > > > > bitmap epilogue_live_in = df_get_live_in (EXIT_BLOCK_PTR_FOR_FN > > > > (cfun)); > > > > for (int reg = FIRST_LO_REGNUM; reg <= LAST_LO_REGNUM; reg++) > > > > - if (!callee_saved_reg_p (reg) && !REGNO_REG_SET_P > > > > (epilogue_live_in, reg)) > > > > + if (!callee_saved_reg_p (reg) && !REGNO_REG_SET_P > > > > (epilogue_live_in, reg) > > > > + && !fixed_regs[reg]) > > > > mask |= 1 << (reg - FIRST_LO_REGNUM); > > > > return mask; > > > > } > > > > diff --git a/gcc/testsuite/gcc.target/arm/pr117468.c > > > > b/gcc/testsuite/gcc.target/arm/pr117468.c > > > > new file mode 100644 > > > > index 00000000000..dc2dd9720ec > > > > --- /dev/null > > > > +++ b/gcc/testsuite/gcc.target/arm/pr117468.c > > > > @@ -0,0 +1,13 @@ > > > > + > > > > +/* { dg-do compile } */ > > > > +/* { dg-options "-O2 -ffixed-r7" } */ > > > > +/* { dg-require-effective-target arm_arch_v5t_thumb_ok } */ > > > > +/* { dg-add-options arm_arch_v5t_thumb } */ > > > > +void ext_func(int e1, int e2, int e3, int e4); > > > > + > > > > +int bad_func(int p1, int p2, int p3, int p4) { > > > > + ext_func(p4, p3, p2, p1); > > > > + return p1 + p2 + p3 + p4; > > > > +} > > > > + > > > > +/* { dg-final { scan-assembler-not "pop.*r7" } } */
