gcc/ChangeLog:
* config/rx/linux.h (TARGET_CPU_CPP_BUILTINS): Add FDPIC macros.
(STARTFILE_SPEC): Add FDPIC support.
(ENDFILE_SPEC): Likewise.
(ASM_SPEC): Likewise.
(LIB_SPEC): New.
(LINK_SPEC): New.
(PREFERRED_DEBUGGING_TYPE): New.
(PIC_REG): New.
(GOT_SYMBOL_NAME): New.
(PIC_OFFSET_TABLE_REGNUM): New.
(PIC_OFFSET_TABLE_REG_CALL_CLOBBERED): New.
(TARGET_ASM_FILE_END): New.
(NO_FUNCTION_CSE): New.
* config/rx/rx-protos.h (nonpic_symbol_mentioned_p): New prototype.
(legitimize_pic_address): Likewise.
(rx_get_fdpic_reg_initial_val): Likewise.
(rx_load_function_descriptor): Likewise.
(rx_mov_pic_operands): Likewise.
(rx_pic_vector_address): Likewise.
* config/rx/rx.h (LINK_SPEC): Add shared.
(LEGITIMATE_PIC_OPERAND_P): New.
(SYMBOLIC_CONST_P): New.
(PIC_CASE_VECTOR_ADDRESS): New.
* config/rx/rx.opt: Add --mfdpic.
Signed-off-by: Yoshinori Sato <[email protected]>
---
gcc/config/rx/linux.h | 44 +++++++++++++++++++++++++++++++++++++++
gcc/config/rx/rx-protos.h | 8 +++++++
gcc/config/rx/rx.h | 17 ++++++++++++++-
gcc/config/rx/rx.opt | 6 ++++++
4 files changed, 74 insertions(+), 1 deletion(-)
diff --git a/gcc/config/rx/linux.h b/gcc/config/rx/linux.h
index 9ee484af886..c6d56aa6816 100644
--- a/gcc/config/rx/linux.h
+++ b/gcc/config/rx/linux.h
@@ -45,6 +45,11 @@
if (ALLOW_RX_FPU_INSNS) \
builtin_define ("__RX_FPU_INSNS__"); \
\
+ if (TARGET_FDPIC) \
+ { \
+ builtin_define ("__FDPIC__"); \
+ builtin_define ("__RX_FDPIC__"); \
+ } \
} \
while (0)
@@ -52,6 +57,12 @@
#define CC1_SPEC "\
%{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC "%{mfdpic:crtreloc.o%s} %{!shared: crt1.o%s} crti.o%s "
+
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC "crtn.o%s"
+
#undef ASM_SPEC
#define ASM_SPEC "\
%{mbig-endian-data:-mbig-endian-data} \
@@ -59,8 +70,25 @@
%{!m64bit-doubles:-m32bit-doubles} \
%{msmall-data-limit*:-msmall-data-limit} \
%{mrelax:-relax} \
+%{mfdpic:--fdpic} \
"
+#undef LIB_SPEC
+#define LIB_SPEC " \
+--start-group \
+-lc \
+--end-group \
+"
+
+#undef LINK_SPEC
+#define LINK_SPEC \
+ "%{!shared: %{!static: \
+ %{rdynamic:-export-dynamic} \
+ %{!dynamic-linker:-dynamic-linker " UCLIBC_DYNAMIC_LINKER "}} \
+ %{static}} \
+ %{mfdpic:%{!shared:-pie}} \
+ %{shared:-shared}"
+
#undef DATA_SECTION_ASM_OP
#define DATA_SECTION_ASM_OP \
"\t.section .data,\"aw\",@progbits\n\t.p2align 2"
@@ -226,6 +254,22 @@
while (0)
#undef PREFERRED_DEBUGGING_TYPE
+#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
#undef TARGET_AS100_SYNTAX
#define TARGET_AS100_SYNTAX 0
+
+#define PIC_REG 13
+#define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_"
+
+/* Register to hold the addressing base for position independent
+ code access to data items. */
+#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? PIC_REG : INVALID_REGNUM)
+
+/* For FDPIC, the FDPIC register is call-clobbered (otherwise PLT
+ entries would need to handle saving and restoring it). */
+#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED TARGET_FDPIC
+
+#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
+
+#define NO_FUNCTION_CSE (flag_pic)
diff --git a/gcc/config/rx/rx-protos.h b/gcc/config/rx/rx-protos.h
index 0c6e7934ed9..e467cfdc4a9 100644
--- a/gcc/config/rx/rx-protos.h
+++ b/gcc/config/rx/rx-protos.h
@@ -171,4 +171,12 @@ rx_find_use_of_reg (rtx reg, rtx_insn* insn, F stepfunc)
#endif
+bool nonpic_symbol_mentioned_p (rtx x);
+rtx legitimize_pic_address (rtx orig,
+ machine_mode mode ATTRIBUTE_UNUSED, rtx reg);
+rtx rx_get_fdpic_reg_initial_val (void);
+rtx rx_load_function_descriptor (rtx sym);
+rtx rx_mov_pic_operands(rtx x, bool offset);
+rtx rx_pic_vector_address(rtx index);
+
#endif /* GCC_RX_PROTOS_H */
diff --git a/gcc/config/rx/rx.h b/gcc/config/rx/rx.h
index 8c95ad9477f..c7000e5b7bf 100644
--- a/gcc/config/rx/rx.h
+++ b/gcc/config/rx/rx.h
@@ -119,7 +119,8 @@
"
#undef LINK_SPEC
-#define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
+#define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} \
+ %{mrelax:-relax} %{shared:-shared}"
#define BITS_BIG_ENDIAN 0
@@ -640,3 +641,17 @@ typedef unsigned int CUMULATIVE_ARGS;
(LENGTH) = rx_adjust_insn_length ((INSN), (LENGTH)); \
} \
while (0)
+
+/* Position Independent Code. */
+
+/* We can't directly access anything that contains a symbol,
+ nor can we indirect via the constant pool. */
+int rx_legitimate_pic_operand_p(rtx x);
+#define LEGITIMATE_PIC_OPERAND_P(X) \
+ rx_legitimate_pic_operand_p (X)
+
+#define SYMBOLIC_CONST_P(X) \
+((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF) \
+ && nonpic_symbol_mentioned_p (X))
+
+#define PIC_CASE_VECTOR_ADDRESS(index) rx_pic_vector_address(index)
diff --git a/gcc/config/rx/rx.opt b/gcc/config/rx/rx.opt
index b3698f14594..dd45544c298 100644
--- a/gcc/config/rx/rx.opt
+++ b/gcc/config/rx/rx.opt
@@ -143,3 +143,9 @@ Enables or disables the use of the SMOVF, SMOVB, SMOVU,
SUNTIL, SWHILE and RMPA
mjsr
Target Mask(JSR)
Always use JSR, never BSR, for calls.
+
+;---------------------------------------------------
+
+mfdpic
+Target Var(TARGET_FDPIC) Init(0)
+Generate ELF FDPIC code.
--
2.47.3
