> diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc > index 7ca183cde22..120e59d5dad 100644 > --- a/gcc/config/riscv/riscv-v.cc > +++ b/gcc/config/riscv/riscv-v.cc > @@ -6181,6 +6181,10 @@ can_be_broadcast_p (rtx op) > if (mode == HFmode && !TARGET_ZVFH) > return false; > > + /* We don't have a vfmv.bf16.v.f. */ > + if (mode == BFmode) > + return false; > +
It can be just use vfmv.v.f / vmv.v.x > /* Same for float, just that we can always handle 64-bit doubles > even on !TARGET_64BIT. We have ruled out 16-bit HF already > above. */ > @@ -6220,6 +6224,10 @@ strided_broadcast_p (rtx op) > if (!TARGET_ZVFH && mode == HFmode) > return true; > > + /* We don't have a vfmv.bf16.v.f. */ > + if (mode == BFmode) > + return true; > + and vfmv.v.f/vmv.v.x here So I think we could allow both for bf16. > return false; > } > > +;; Used for permutes and loads/stores, i.e. operations that are int/float > +;; agnostic. Some loads/stores still only use V for now but we can change > +;; that. > (define_mode_iterator V_VLS [V VLS]) > > +;; Same as V_VLS but with ZVFH instead of ZVFHMIN. Currently only used for > +;; vec_extract and vec_set because those use vm(f)v. As those are just s/vm(f)v/v(f)mv/ > +;; permutes we could pun with an integer type when the actual mode is > +;; not supported. (Just as we already do for broadcasting unsupported > +;; modes, see V_VLSF_FALLBACK). > (define_mode_iterator V_VLS_ZVFH [V_ZVFH VLS_ZVFH]) >
