Because it is redundant to specify 'i'-constraints on operands in single-
alternative match templates whose predicates are "const_int_operand" itself
or those that imply CONST_INT_P().
This patch also removes the 'i'-constraints on the next argument of the
callee (the number of bytes of arguments) in the four "call_internal"
patterns, since we are not interested in these arguments.
gcc/ChangeLog:
* config/xtensa/xtensa.md (*addsubx, *subsi3_from_const,
*xtensa_clamps, *andsi3_const_pow2_minus_one,
*andsi3_const_negative_pow2, *andsi3_const_shifted_mask,
*splice_bits, extvsi_internal, extzvsi_internal,
*extzvsi-1bit_ashlsi3, *extzvsi-1bit_addsubx, insvsi, *lsiu, *ssiu,
*lsip, *ssip, *shift_per_byte_omit_AND_0, *shift_per_byte_omit_AND_1,
*shlrd_const, *shlrd_per_byte_omit_AND, *masktrue_const_bitcmpl,
*masktrue_const_pow2_minus_one, *masktrue_const_negative_pow2,
*masktrue_const_shifted_mask, call_internal, call_value_internal,
sibcall_internal, sibcall_value_internal, entry,
*eqne_zero_masked_bits, *eqne_in_range): Remove 'i'-constraint.
---
gcc/config/xtensa/xtensa.md | 86 ++++++++++++++++++-------------------
1 file changed, 43 insertions(+), 43 deletions(-)
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index aa64808ea62..05bafdea23d 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -190,7 +190,7 @@
[(set (match_operand:SI 0 "register_operand" "=a")
(match_operator:SI 4 "addsub_operator"
[(ashift:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 3 "addsubx_operand" "i"))
+ (match_operand:SI 3 "addsubx_operand" ""))
(match_operand:SI 2 "register_operand" "r")]))]
"TARGET_ADDX"
{
@@ -270,7 +270,7 @@
(define_insn_and_split "*subsi3_from_const"
[(set (match_operand:SI 0 "register_operand" "=a")
- (minus:SI (match_operand:SI 1 "const_int_operand" "i")
+ (minus:SI (match_operand:SI 1 "const_int_operand" "")
(match_operand:SI 2 "register_operand" "r")))]
"xtensa_simm8 (-INTVAL (operands[1]))
|| xtensa_simm8x256 (-INTVAL (operands[1]))"
@@ -545,8 +545,8 @@
(match_operator:SI 5 "xtensa_sminmax_operator"
[(match_operator:SI 4 "xtensa_sminmax_operator"
[(match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 2 "const_int_operand" "i")])
- (match_operand:SI 3 "const_int_operand" "i")]))]
+ (match_operand:SI 2 "const_int_operand" "")])
+ (match_operand:SI 3 "const_int_operand" "")]))]
"TARGET_MINMAX && TARGET_CLAMPS
&& INTVAL (operands[2]) + INTVAL (operands[3]) == -1
&& ((GET_CODE (operands[5]) == SMIN && GET_CODE (operands[4]) == SMAX
@@ -747,7 +747,7 @@
(define_insn_and_split "*andsi3_const_pow2_minus_one"
[(set (match_operand:SI 0 "register_operand" "=a")
(and:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 2 "const_int_operand" "i")))]
+ (match_operand:SI 2 "const_int_operand" "")))]
"IN_RANGE (exact_log2 (INTVAL (operands[2]) + 1), 17, 31)"
"#"
"&& 1"
@@ -771,7 +771,7 @@
(define_insn_and_split "*andsi3_const_negative_pow2"
[(set (match_operand:SI 0 "register_operand" "=a")
(and:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 2 "const_int_operand" "i")))]
+ (match_operand:SI 2 "const_int_operand" "")))]
"IN_RANGE (exact_log2 (-INTVAL (operands[2])), 12, 31)"
"#"
"&& 1"
@@ -791,7 +791,7 @@
(define_insn_and_split "*andsi3_const_shifted_mask"
[(set (match_operand:SI 0 "register_operand" "=a")
(and:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 2 "shifted_mask_operand" "i")))]
+ (match_operand:SI 2 "shifted_mask_operand" "")))]
"! xtensa_simm12b (INTVAL (operands[2]))"
"#"
"&& 1"
@@ -868,9 +868,9 @@
(define_insn_and_split "*splice_bits"
[(set (match_operand:SI 0 "register_operand" "=a")
(ior:SI (and:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 3 "const_int_operand" "i"))
+ (match_operand:SI 3 "const_int_operand" ""))
(and:SI (match_operand:SI 2 "register_operand" "r")
- (match_operand:SI 4 "const_int_operand" "i"))))]
+ (match_operand:SI 4 "const_int_operand" ""))))]
"!optimize_debug && optimize
&& INTVAL (operands[3]) + INTVAL (operands[4]) == -1
@@ -997,8 +997,8 @@
(define_insn "extvsi_internal"
[(set (match_operand:SI 0 "register_operand" "=a")
(sign_extract:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 2 "sext_fldsz_operand" "i")
- (match_operand:SI 3 "lsbitnum_operand" "i")))]
+ (match_operand:SI 2 "sext_fldsz_operand" "")
+ (match_operand:SI 3 "lsbitnum_operand" "")))]
"TARGET_SEXT"
{
int fldsz = INTVAL (operands[2]);
@@ -1026,8 +1026,8 @@
(define_insn "extzvsi_internal"
[(set (match_operand:SI 0 "register_operand" "=a")
(zero_extract:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 2 "extui_fldsz_operand" "i")
- (match_operand:SI 3 "const_int_operand" "i")))]
+ (match_operand:SI 2 "extui_fldsz_operand" "")
+ (match_operand:SI 3 "const_int_operand" "")))]
""
{
int shift;
@@ -1046,8 +1046,8 @@
[(set (match_operand:SI 0 "register_operand" "=a")
(and:SI (match_operator:SI 4 "logical_shift_operator"
[(match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 2 "const_int_operand" "i")])
- (match_operand:SI 3 "const_int_operand" "i")))]
+ (match_operand:SI 2 "const_int_operand" "")])
+ (match_operand:SI 3 "const_int_operand" "")))]
"exact_log2 (INTVAL (operands[3])) > 0"
"#"
"&& 1"
@@ -1078,8 +1078,8 @@
(match_operator:SI 5 "addsub_operator"
[(and:SI (match_operator:SI 6 "logical_shift_operator"
[(match_operand:SI 1 "register_operand" "r0")
- (match_operand:SI 3 "const_int_operand" "i")])
- (match_operand:SI 4 "const_int_operand" "i"))
+ (match_operand:SI 3 "const_int_operand" "")])
+ (match_operand:SI 4 "const_int_operand" ""))
(match_operand:SI 2 "register_operand" "r")]))]
"TARGET_ADDX
&& IN_RANGE (exact_log2 (INTVAL (operands[4])), 1, 3)"
@@ -1108,8 +1108,8 @@
(define_insn "insvsi"
[(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+a")
- (match_operand:SI 1 "extui_fldsz_operand" "i")
- (match_operand:SI 2 "const_int_operand" "i"))
+ (match_operand:SI 1 "extui_fldsz_operand" "")
+ (match_operand:SI 2 "const_int_operand" ""))
(match_operand:SI 3 "register_operand" "r"))]
"TARGET_DEPBITS"
{
@@ -1430,7 +1430,7 @@
(define_insn "*lsiu"
[(set (match_operand:SF 0 "register_operand" "=f")
(mem:SF (plus:SI (match_operand:SI 1 "register_operand" "+a")
- (match_operand:SI 2 "fpmem_offset_operand" "i"))))
+ (match_operand:SI 2 "fpmem_offset_operand" ""))))
(set (match_dup 1)
(plus:SI (match_dup 1) (match_dup 2)))]
"TARGET_HARD_FLOAT && !TARGET_HARD_FLOAT_POSTINC"
@@ -1445,7 +1445,7 @@
(define_insn "*ssiu"
[(set (mem:SF (plus:SI (match_operand:SI 0 "register_operand" "+a")
- (match_operand:SI 1 "fpmem_offset_operand" "i")))
+ (match_operand:SI 1 "fpmem_offset_operand" "")))
(match_operand:SF 2 "register_operand" "f"))
(set (match_dup 0)
(plus:SI (match_dup 0) (match_dup 1)))]
@@ -1464,7 +1464,7 @@
(mem:SF (match_operand:SI 1 "register_operand" "+a")))
(set (match_dup 1)
(plus:SI (match_dup 1)
- (match_operand:SI 2 "fpmem_offset_operand" "i")))]
+ (match_operand:SI 2 "fpmem_offset_operand" "")))]
"TARGET_HARD_FLOAT && TARGET_HARD_FLOAT_POSTINC"
{
if (TARGET_SERIALIZE_VOLATILE && volatile_refs_p (PATTERN (insn)))
@@ -1480,7 +1480,7 @@
(match_operand:SF 1 "register_operand" "f"))
(set (match_dup 0)
(plus:SI (match_dup 0)
- (match_operand:SI 2 "fpmem_offset_operand" "i")))]
+ (match_operand:SI 2 "fpmem_offset_operand" "")))]
"TARGET_HARD_FLOAT && TARGET_HARD_FLOAT_POSTINC"
{
if (TARGET_SERIALIZE_VOLATILE && volatile_refs_p (PATTERN (insn)))
@@ -1637,7 +1637,7 @@
[(match_operand:SI 1 "register_operand" "r")
(and:SI (ashift:SI (match_operand:SI 2 "register_operand" "r")
(const_int 3))
- (match_operand:SI 3 "const_int_operand" "i"))]))]
+ (match_operand:SI 3 "const_int_operand" ""))]))]
"!optimize_debug && optimize
&& (INTVAL (operands[3]) & 0x1f) == 3 << 3"
"#"
@@ -1658,7 +1658,7 @@
[(match_operand:SI 1 "register_operand" "r")
(neg:SI (and:SI (ashift:SI (match_operand:SI 2 "register_operand"
"r")
(const_int 3))
- (match_operand:SI 3 "const_int_operand"
"i")))]))]
+ (match_operand:SI 3 "const_int_operand"
"")))]))]
"!optimize_debug && optimize
&& (INTVAL (operands[3]) & 0x1f) == 3 << 3"
"#"
@@ -1732,10 +1732,10 @@
(match_operator:SI 7 "xtensa_bit_join_operator"
[(match_operator:SI 5 "logical_shift_operator"
[(match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 3 "const_int_operand" "i")])
+ (match_operand:SI 3 "const_int_operand" "")])
(match_operator:SI 6 "logical_shift_operator"
[(match_operand:SI 2 "register_operand" "r")
- (match_operand:SI 4 "const_int_operand" "i")])]))]
+ (match_operand:SI 4 "const_int_operand" "")])]))]
"!optimize_debug && optimize
&& xtensa_shlrd_which_direction (operands[5], operands[6]) != UNKNOWN
&& IN_RANGE (INTVAL (operands[3]), 1, 31)
@@ -1785,7 +1785,7 @@
[(match_operand:SI 1 "register_operand" "r")
(and:SI (ashift:SI (match_operand:SI 2 "register_operand"
"r")
(const_int 3))
- (match_operand:SI 4 "const_int_operand" "i"))])
+ (match_operand:SI 4 "const_int_operand" ""))])
(match_operator:SI 6 "logical_shift_operator"
[(match_operand:SI 3 "register_operand" "r")
(neg:SI (and:SI (ashift:SI (match_dup 2)
@@ -2007,7 +2007,7 @@
[(set (pc)
(if_then_else (match_operator 3 "boolean_operator"
[(and:SI (not:SI (match_operand:SI 0 "register_operand"
"r"))
- (match_operand:SI 1 "const_int_operand" "i"))
+ (match_operand:SI 1 "const_int_operand" ""))
(const_int 0)])
(label_ref (match_operand 2 "" ""))
(pc)))]
@@ -2060,8 +2060,8 @@
[(set (pc)
(if_then_else (match_operator 4 "boolean_operator"
[(and:SI (match_operand:SI 0 "register_operand" "r")
- (match_operand:SI 1 "const_int_operand" "i"))
- (match_operand:SI 2 "const_int_operand" "i")])
+ (match_operand:SI 1 "const_int_operand" ""))
+ (match_operand:SI 2 "const_int_operand" "")])
(label_ref (match_operand 3 "" ""))
(pc)))]
"IN_RANGE (exact_log2 (INTVAL (operands[1]) + 1), 17, 31)
@@ -2100,8 +2100,8 @@
[(set (pc)
(if_then_else (match_operator 4 "boolean_operator"
[(and:SI (match_operand:SI 0 "register_operand" "r")
- (match_operand:SI 1 "const_int_operand" "i"))
- (match_operand:SI 2 "const_int_operand" "i")])
+ (match_operand:SI 1 "const_int_operand" ""))
+ (match_operand:SI 2 "const_int_operand" "")])
(label_ref (match_operand 3 "" ""))
(pc)))]
"IN_RANGE (exact_log2 (-INTVAL (operands[1])), 1, 30)
@@ -2135,8 +2135,8 @@
[(set (pc)
(if_then_else (match_operator 4 "boolean_operator"
[(and:SI (match_operand:SI 0 "register_operand" "r")
- (match_operand:SI 1 "shifted_mask_operand"
"i"))
- (match_operand:SI 2 "const_int_operand" "i")])
+ (match_operand:SI 1 "shifted_mask_operand" ""))
+ (match_operand:SI 2 "const_int_operand" "")])
(label_ref (match_operand 3 "" ""))
(pc)))]
"/* (INTVAL (operands[2]) & ((1 << ctz_hwi (INTVAL (operands[1]))) - 1)) ==
0 // can be omitted
@@ -2517,7 +2517,7 @@
(define_insn "call_internal"
[(call (mem (match_operand:SI 0 "call_insn_operand" "nir"))
- (match_operand 1 "" "i"))]
+ (match_operand 1 "" ""))]
"!SIBLING_CALL_P (insn)"
{
return xtensa_emit_call (0, operands);
@@ -2539,7 +2539,7 @@
(define_insn "call_value_internal"
[(set (match_operand 0 "register_operand" "=a")
(call (mem (match_operand:SI 1 "call_insn_operand" "nir"))
- (match_operand 2 "" "i")))]
+ (match_operand 2 "" "")))]
"!SIBLING_CALL_P (insn)"
{
return xtensa_emit_call (1, operands);
@@ -2559,7 +2559,7 @@
(define_insn "sibcall_internal"
[(call (mem:SI (match_operand:SI 0 "call_insn_operand" "nic"))
- (match_operand 1 "" "i"))]
+ (match_operand 1 "" ""))]
"!TARGET_WINDOWED_ABI && SIBLING_CALL_P (insn)"
{
return xtensa_emit_sibcall (0, operands);
@@ -2581,7 +2581,7 @@
(define_insn "sibcall_value_internal"
[(set (match_operand 0 "register_operand" "=a")
(call (mem:SI (match_operand:SI 1 "call_insn_operand" "nic"))
- (match_operand 2 "" "i")))]
+ (match_operand 2 "" "")))]
"!TARGET_WINDOWED_ABI && SIBLING_CALL_P (insn)"
{
return xtensa_emit_sibcall (1, operands);
@@ -2613,7 +2613,7 @@
(define_insn "entry"
[(set (reg:SI A1_REG)
- (unspec_volatile:SI [(match_operand:SI 0 "const_int_operand" "i")]
+ (unspec_volatile:SI [(match_operand:SI 0 "const_int_operand" "")]
UNSPECV_ENTRY))]
""
"entry\tsp, %0"
@@ -3179,7 +3179,7 @@
[(set (match_operand:SI 0 "register_operand" "=a")
(match_operator:SI 3 "boolean_operator"
[(and:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand:SI 2 "const_int_operand" "i"))
+ (match_operand:SI 2 "const_int_operand" ""))
(const_int 0)]))]
"IN_RANGE (exact_log2 (INTVAL (operands[2]) + 1), 17, 31)
|| IN_RANGE (exact_log2 (-INTVAL (operands[2])), 1, 30)"
@@ -3237,8 +3237,8 @@
[(set (pc)
(if_then_else (match_operator 4 "alt_ubranch_operator"
[(plus:SI (match_operand:SI 0 "register_operand" "r")
- (match_operand:SI 1 "const_int_operand" "i"))
- (match_operand:SI 2 "const_int_operand" "i")])
+ (match_operand:SI 1 "const_int_operand" ""))
+ (match_operand:SI 2 "const_int_operand" "")])
(label_ref (match_operand 3 ""))
(pc)))
(clobber (match_scratch:SI 5 "=&a"))]
--
2.39.5
