The current implementation of the fnmam4 instruction template requires
the third source operand to be assigned the same hard register as the
target operand, but the constraint is not documented in the instruction
manual or standard template definitions. The current constraint will
generate additional data dependencies and extra instructions.
gcc/ChangeLog:
* config/loongarch/lasx.md: Constraint correction.
* config/loongarch/lsx.md: Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/fnmam4-vec.c: New test.
---
gcc/config/loongarch/lasx.md | 4 ++--
gcc/config/loongarch/lsx.md | 4 ++--
gcc/testsuite/gcc.target/loongarch/fnmam4-vec.c | 14 ++++++++++++++
3 files changed, 18 insertions(+), 4 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/fnmam4-vec.c
diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md
index 3d71f30a54b..c739eb57c9f 100644
--- a/gcc/config/loongarch/lasx.md
+++ b/gcc/config/loongarch/lasx.md
@@ -997,9 +997,9 @@
[(set (match_operand:FLASX 0 "register_operand" "=f")
(fma:FLASX (neg:FLASX (match_operand:FLASX 1 "register_operand" "f"))
(match_operand:FLASX 2 "register_operand" "f")
- (match_operand:FLASX 3 "register_operand" "0")))]
+ (match_operand:FLASX 3 "register_operand" "f")))]
"ISA_HAS_LASX"
- "xvfnmsub.<flasxfmt>\t%u0,%u1,%u2,%u0"
+ "xvfnmsub.<flasxfmt>\t%u0,%u1,%u2,%u3"
[(set_attr "type" "simd_fmadd")
(set_attr "mode" "<MODE>")])
diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md
index fb0236ba0f1..cfbb3d79b2e 100644
--- a/gcc/config/loongarch/lsx.md
+++ b/gcc/config/loongarch/lsx.md
@@ -856,9 +856,9 @@
[(set (match_operand:FLSX 0 "register_operand" "=f")
(fma:FLSX (neg:FLSX (match_operand:FLSX 1 "register_operand" "f"))
(match_operand:FLSX 2 "register_operand" "f")
- (match_operand:FLSX 3 "register_operand" "0")))]
+ (match_operand:FLSX 3 "register_operand" "f")))]
"ISA_HAS_LSX"
- "vfnmsub.<flsxfmt>\t%w0,%w1,%w2,%w0"
+ "vfnmsub.<flsxfmt>\t%w0,%w1,%w2,%w3"
[(set_attr "type" "simd_fmadd")
(set_attr "mode" "<MODE>")])
diff --git a/gcc/testsuite/gcc.target/loongarch/fnmam4-vec.c
b/gcc/testsuite/gcc.target/loongarch/fnmam4-vec.c
new file mode 100644
index 00000000000..6c67cf84e4d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/fnmam4-vec.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mlasx -ftree-vectorize" } */
+/* { dg-require-effective-target loongarch_asx } */
+
+void
+foo (float *u, float x, float *y, float z)
+{
+ int i;
+ for (i = 0; i < 1024; i++)
+ *(u++) = (x - y[i] * z);
+}
+
+/* { dg-final { scan-assembler-not "\tvori.b"} } */
+/* { dg-final { scan-assembler-not "\txvori.b"} } */
--
2.20.1
