Hi,
This patch builds on a previous one that allowed symbol+offset as symbol
references for memory accesses. It allows us to have symbol+offset even
when no memory access is apparent.
It reduces codesize for cases such as this one:
int arr[100];
uint64_t foo (uint64_t a) {
uint64_t const z = 1234567ll<<32+7;
uint64_t const y = (uint64_t) &arr[3];
return y + a + z;
}
Before the patch, the code looked like this:
adrp x2, arr
mov x1, 74217034874880
add x2, x2, :lo12:arr
add x2, x2, 12
movk x1, 2411, lsl 48
add x1, x2, x1
add x0, x1, x0
ret
Now, it looks like this:
adrp x1, arr+12
mov x2, 74217034874880
movk x2, 2411, lsl 48
add x1, x1, :lo12:arr+12
add x1, x1, x2
add x0, x1, x0
ret
Testing shows no regressions. OK to commit?
2012-08-31 Ian Bolton <ian.bol...@arm.com>
* gcc/config/aarch64/aarch64.md: New pattern.
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index a00d3f0..de9c927 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -2795,7 +2795,7 @@
(lo_sum:DI (match_operand:DI 1 "register_operand" "r")
(match_operand 2 "aarch64_valid_symref" "S")))]
""
- "add\\t%0, %1, :lo12:%2"
+ "add\\t%0, %1, :lo12:%a2"
[(set_attr "v8type" "alu")
(set_attr "mode" "DI")]
@@ -2890,6 +2890,20 @@
[(set_attr "length" "0")]
)
+(define_split
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (const:DI (plus:DI (match_operand:DI 1 "aarch64_valid_symref" "S")
+ (match_operand:DI 2 "const_int_operand" "i"))))]
+ ""
+ [(set (match_dup 0) (high:DI (const:DI (plus:DI (match_dup 1)
+ (match_dup 2)))))
+ (set (match_dup 0) (lo_sum:DI (match_dup 0)
+ (const:DI (plus:DI (match_dup 1)
+ (match_dup 2)))))]
+ ""
+)
+
+
;; AdvSIMD Stuff
(include "aarch64-simd.md")