From: Jiajie Chen <[email protected]>
The current SF/DF -> unsigned DI expand rules require iordi3 insn which
is not available in loongarch32.
gcc/ChangeLog:
* config/loongarch/loongarch.md (fixuns_truncdfdi2): Add
TARGET_64BIT to condition.
(fixuns_truncsfdi2): Add TARGET_64BIT to condition.
---
gcc/config/loongarch/loongarch.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/loongarch/loongarch.md
b/gcc/config/loongarch/loongarch.md
index ad8f2a51d12..e783d6b9446 100644
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -2004,7 +2004,7 @@ (define_expand "fixuns_truncdfsi2"
(define_expand "fixuns_truncdfdi2"
[(set (match_operand:DI 0 "register_operand")
(unsigned_fix:DI (match_operand:DF 1 "register_operand")))]
- "TARGET_DOUBLE_FLOAT"
+ "TARGET_DOUBLE_FLOAT && TARGET_64BIT"
{
rtx reg1 = gen_reg_rtx (DFmode);
rtx reg2 = gen_reg_rtx (DFmode);
@@ -2086,7 +2086,7 @@ (define_expand "fixuns_truncsfsi2"
(define_expand "fixuns_truncsfdi2"
[(set (match_operand:DI 0 "register_operand")
(unsigned_fix:DI (match_operand:SF 1 "register_operand")))]
- "TARGET_DOUBLE_FLOAT"
+ "TARGET_DOUBLE_FLOAT && TARGET_64BIT"
{
rtx reg1 = gen_reg_rtx (SFmode);
rtx reg2 = gen_reg_rtx (SFmode);
--
2.34.1
