This is version 8 of my patch to add -mcpu=future. I originally made a more complicated patch (V5) on September 22nd, 2025 that tried to do infrastructure cleanup as well as adding -mcpu=future. This patch is a more limited patch in that it just adds the -mcpu=future patch, and it does not do the other infrastructure work.
I submitted version 6 of the patch on November 6th. However, in that patch, I forgot to add code to set the .machine directive to "future" if the user did -mcpu=future and I submitted version 7 on November 7th. This is version 8 of the -mcpu=future patch. It goes back to the old method of adding -mcpu=<xxx> options by adding a new ISA bit for that processor. If the user uses -mcpu=future, -mfuture is passed to the assembler. I added support so the configuration option --with-cpu=future is used, it will set the default cpu type. Can I check this patch into the GCC trunk? I have built bootstrap builds on both a little endian Power10 system and a big endian Power9 system and there were no regressions. On the little endian Power10 system, I built the last run using the --with-cpu=future configuration option. 2025-11-14 Michael Meissner <[email protected]> gcc/ * config.gcc (powerpc*-*-*): Add support for -mcpu=future. * config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for -mcpu=future. * config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise. * config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define _ARCH_FUTURE if -mcpu=future. * config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macros. (POWERPC_MASKS): Add OPTION_MASK_FUTURE. * config/rs6000/rs6000-tables.opt: Regenerate. (future processor): Add -mcpu=future. * config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): Define as power11. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for -mcpu=future. * config/rs6000/rs6000.opt (-mfuture): New option. * doc/invoke.texi (IBM RS/6000 and PowerPC Options): Document -mcpu=future. gcc/testsuite/ * gcc.target/powerpc/future-1.c: New test. * gcc.target/powerpc/future-2.c: Likewise. --- gcc/config.gcc | 4 ++-- gcc/config/rs6000/aix71.h | 1 + gcc/config/rs6000/aix72.h | 1 + gcc/config/rs6000/aix73.h | 1 + gcc/config/rs6000/rs6000-c.cc | 2 ++ gcc/config/rs6000/rs6000-cpus.def | 6 ++++++ gcc/config/rs6000/rs6000-opts.h | 2 ++ gcc/config/rs6000/rs6000-tables.opt | 3 +++ gcc/config/rs6000/rs6000.cc | 3 +++ gcc/config/rs6000/rs6000.h | 1 + gcc/config/rs6000/rs6000.opt | 5 +++++ gcc/doc/invoke.texi | 7 +++++- gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +++++++++++ gcc/testsuite/gcc.target/powerpc/future-2.c | 24 +++++++++++++++++++++ 14 files changed, 70 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/future-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/future-2.c diff --git a/gcc/config.gcc b/gcc/config.gcc index d2770ea556b..07d0409b509 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -542,7 +542,7 @@ powerpc*-*-*) extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h" extra_headers="${extra_headers} amo.h" case x$with_cpu in - xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500) + xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture) cpu_is_64bit=yes ;; esac @@ -5752,7 +5752,7 @@ case "${target}" in tm_defines="${tm_defines} CONFIG_PPC405CR" eval "with_$which=405" ;; - "" | common | native \ + "" | common | native | future \ | power[3456789] | power1[01] | power5+ | power6x \ | powerpc | powerpc64 | powerpc64le \ | rs64 \ diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h index 2b21dd7cd1e..77651f5ea30 100644 --- a/gcc/config/rs6000/aix71.h +++ b/gcc/config/rs6000/aix71.h @@ -79,6 +79,7 @@ do { \ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpwr11; \ mcpu=power10: -mpwr10; \ mcpu=power9: -mpwr9; \ diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h index 53c0bde5ad4..652f60c7f49 100644 --- a/gcc/config/rs6000/aix72.h +++ b/gcc/config/rs6000/aix72.h @@ -79,6 +79,7 @@ do { \ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpwr11; \ mcpu=power10: -mpwr10; \ mcpu=power9: -mpwr9; \ diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h index c7639368a26..3c66ac1d917 100644 --- a/gcc/config/rs6000/aix73.h +++ b/gcc/config/rs6000/aix73.h @@ -79,6 +79,7 @@ do { \ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpwr11; \ mcpu=power10: -mpwr10; \ mcpu=power9: -mpwr9; \ diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index d3b0a566821..6757a2477ad 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -437,6 +437,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10"); if ((flags & OPTION_MASK_POWER11) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11"); + if ((flags & OPTION_MASK_FUTURE) != 0) + rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE"); if ((flags & OPTION_MASK_SOFT_FLOAT) != 0) rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT"); if ((flags & OPTION_MASK_RECIP_PRECISION) != 0) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 4a1037616d7..18547d82811 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -83,6 +83,10 @@ #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \ | OPTION_MASK_POWER11) +/* -mcpu=future flags. */ +#define FUTURE_MASKS_SERVER (POWER11_MASKS_SERVER \ + | OPTION_MASK_FUTURE) + /* Flags that need to be turned off if -mno-vsx. */ #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX \ | OPTION_MASK_FLOAT128_KEYWORD \ @@ -119,6 +123,7 @@ | OPTION_MASK_FLOAT128_HW \ | OPTION_MASK_FLOAT128_KEYWORD \ | OPTION_MASK_FPRND \ + | OPTION_MASK_FUTURE \ | OPTION_MASK_POWER10 \ | OPTION_MASK_POWER11 \ | OPTION_MASK_P10_FUSION \ @@ -255,3 +260,4 @@ RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM) RS6000_CPU ("rs64", PROCESSOR_RS64A, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64) +RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | FUTURE_MASKS_SERVER) diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h index c31d2975f04..e13ba2ba527 100644 --- a/gcc/config/rs6000/rs6000-opts.h +++ b/gcc/config/rs6000/rs6000-opts.h @@ -71,6 +71,8 @@ enum processor_type PROCESSOR_TITAN }; +/* For now, just use power11 as the base processor for -mcpu=future. */ +#define PROCESSOR_FUTURE PROCESSOR_POWER11 /* Types of costly dependences. */ enum rs6000_dependence_cost diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt index f5bbed5ea74..9e68c5a66e1 100644 --- a/gcc/config/rs6000/rs6000-tables.opt +++ b/gcc/config/rs6000/rs6000-tables.opt @@ -200,3 +200,6 @@ Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56) EnumValue Enum(rs6000_cpu_opt_value) String(rs64) Value(57) +EnumValue +Enum(rs6000_cpu_opt_value) String(future) Value(58) + diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 1d5cd25c0f0..61623df146e 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -5913,6 +5913,8 @@ rs6000_machine_from_flags (void) flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL | OPTION_MASK_ALTIVEC); + if ((flags & (FUTURE_MASKS_SERVER & ~POWER11_MASKS_SERVER)) != 0) + return "future"; if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0) return "power11"; if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0) @@ -24463,6 +24465,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = { "float128", OPTION_MASK_FLOAT128_KEYWORD, false, true }, { "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true }, { "fprnd", OPTION_MASK_FPRND, false, true }, + { "future", OPTION_MASK_FUTURE, false, false }, { "power10", OPTION_MASK_POWER10, false, true }, { "power11", OPTION_MASK_POWER11, false, false }, { "hard-dfp", OPTION_MASK_DFP, false, true }, diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index db6112a09e1..76c6cd1ab8e 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -101,6 +101,7 @@ you make changes here, make them also there. */ #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpower11; \ mcpu=power10: -mpower10; \ mcpu=power9: -mpower9; \ diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 88cf16ca581..7c4f0375424 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -634,6 +634,11 @@ mieee128-constant Target Var(TARGET_IEEE128_CONSTANT) Init(1) Save Generate (do not generate) code that uses the LXVKQ instruction. +;; Potential future machine +mfuture +Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>, use %<-mcpu=future>) +Generate (do not generate) potential future instructions. + ; Documented parameters -param=rs6000-vect-unroll-limit= diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 27a9e2e5e93..42bd76817b8 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -32326,7 +32326,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403}, @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, @samp{power9}, @samp{power10}, @samp{power11}, @samp{powerpc}, @samp{powerpc64}, -@samp{powerpc64le}, @samp{rs64}, and @samp{native}. +@samp{powerpc64le}, @samp{rs64}, @samp{future}, and @samp{native}. @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either @@ -32334,6 +32334,11 @@ endian), 64-bit big endian PowerPC and 64-bit little endian PowerPC architecture machine types, with an appropriate, generic processor model assumed for scheduling purposes. +Specifying @samp{future} as cpu type adds support for new instructions +that may be added to future PowerPC processors. This support is meant +to try out possible new PowerPC instructions, and these instruction +may or may not be used in new official PowerPC processors. + Specifying @samp{native} as cpu type detects and selects the architecture option that corresponds to the host processor of the system performing the compilation. diff --git a/gcc/testsuite/gcc.target/powerpc/future-1.c b/gcc/testsuite/gcc.target/powerpc/future-1.c new file mode 100644 index 00000000000..7bd8e5ddbd0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/future-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +/* Basic check to see if the compiler supports -mcpu=future and if it defines + _ARCH_FUTURE. */ + +#ifndef _ARCH_FUTURE +#error "-mcpu=future is not supported" +#endif + +void foo (void) +{ +} diff --git a/gcc/testsuite/gcc.target/powerpc/future-2.c b/gcc/testsuite/gcc.target/powerpc/future-2.c new file mode 100644 index 00000000000..5552cefa3c2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/future-2.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +/* Check if we can set the future target via a target attribute. */ + +__attribute__((__target__("cpu=power9"))) +void foo_p9 (void) +{ +} + +__attribute__((__target__("cpu=power10"))) +void foo_p10 (void) +{ +} + +__attribute__((__target__("cpu=power11"))) +void foo_p11 (void) +{ +} + +__attribute__((__target__("cpu=future"))) +void foo_future (void) +{ +} -- 2.51.1 -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: [email protected]
