gcc/ChangeLog:
* config/loongarch/loongarch.md: Disable Zc constraint for movsi on
LA32.
---
gcc/config/loongarch/loongarch.md | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/gcc/config/loongarch/loongarch.md
b/gcc/config/loongarch/loongarch.md
index 433b98631b4..04d48cd979e 100644
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -2350,6 +2350,15 @@ (define_expand "movsi"
(match_operand:SI 1 ""))]
""
{
+ if (TARGET_32BIT
+ && ((MEM_P (operands[0])
+ && loongarch_14bit_shifted_offset_address_p (XEXP (operands[0],
0), SImode)
+ && !loongarch_12bit_offset_address_p (XEXP (operands[0], 0),
SImode))
+ || (MEM_P (operands[1])
+ && loongarch_14bit_shifted_offset_address_p (XEXP (operands[1],
0), SImode)
+ && !loongarch_12bit_offset_address_p (XEXP (operands[1], 0),
SImode))))
+ FAIL;
+
if (loongarch_legitimize_move (SImode, operands[0], operands[1]))
DONE;
})
@@ -2358,10 +2367,17 @@ (define_insn_and_split "*movsi_internal"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,w,f,f,r,*m")
(match_operand:SI 1 "move_operand" "r,Yd,w,rJ,rJ,m,f,*f"))]
"(register_operand (operands[0], SImode)
- || reg_or_0_operand (operands[1], SImode))"
+ || reg_or_0_operand (operands[1], SImode))
+ && !(TARGET_32BIT
+ && ((MEM_P (operands[0])
+ && loongarch_14bit_shifted_offset_address_p (XEXP (operands[0],
0), SImode)
+ && !loongarch_12bit_offset_address_p (XEXP (operands[0], 0),
SImode))
+ || (MEM_P (operands[1])
+ && loongarch_14bit_shifted_offset_address_p (XEXP (operands[1],
0), SImode)
+ && !loongarch_12bit_offset_address_p (XEXP (operands[1], 0),
SImode))))"
{ return loongarch_output_move (operands); }
- "CONST_INT_P (operands[1]) && REG_P (operands[0]) && GP_REG_P (REGNO
- (operands[0]))"
+ "&& CONST_INT_P (operands[1]) && REG_P (operands[0])
+ && GP_REG_P (REGNO (operands[0]))"
[(const_int 0)]
"
{
--
2.34.1
