This is not strictly a series but I'll still send it as such as all of them are loosely connected to more VLS enablement.
The series is not clean and there is even one Fortran execution failure. I'll take care of that as well as the regressions still but wanted to get this out of the door during stage 1. I regtested on riscv64 most of the patches individually and all in one. Robin Dapp (6): RISC-V: Change gather/scatter iterators. RISC-V: Rename vector-mode related functions. RISC-V: Add VLS modes to autovec iterators. RISC-V: Enable VLS select_vl loop control. RISC-V: Generic vec_extract via subreg. RISC-V: Generic vec_set via subreg. gcc/config/riscv/autovec-opt.md | 22 +- gcc/config/riscv/autovec.md | 320 ++-- gcc/config/riscv/riscv-avlprop.cc | 2 +- gcc/config/riscv/riscv-protos.h | 6 +- gcc/config/riscv/riscv-selftests.cc | 8 +- gcc/config/riscv/riscv-v.cc | 349 +++- .../riscv/riscv-vector-builtins-bases.cc | 66 +- gcc/config/riscv/riscv-vector-builtins.cc | 4 +- gcc/config/riscv/riscv-vector-costs.cc | 22 +- gcc/config/riscv/riscv.cc | 104 +- gcc/config/riscv/vector-crypto.md | 172 +- gcc/config/riscv/vector-iterators.md | 1519 ++++++++++++++++- gcc/config/riscv/vector.md | 186 +- .../riscv/rvv/autovec/param-autovec-mode.c | 2 +- .../riscv/rvv/autovec/partial/select_vl-2.c | 4 +- 15 files changed, 2210 insertions(+), 576 deletions(-) -- 2.51.0
