Hi all,
Nova Lake will enable AVX10.1, AVX10.2, APX_F and MOVRS according to the
latest documentation.
Due to PTA_XXX would not maintain imply relationships, we need to add
all PTA_AVX512XXX which AVX10 enabled to enable AVX10.1 ISAs. It is not
a redundant addition in i386.h.
Ok for trunk?
Thx,
Haochen
gcc/ChangeLog:
* common/config/i386/i386-common.cc: Adjust to P_PROC_AVX10_1.
* config/i386/driver-i386.cc (host_detect_local_cpu):
Move Nova Lake to under AVX512 part.
* config/i386/i386.h (PTA_NOVALAKE): Add AVX10.1, AVX10.2,
APX_F and MOVRS.
* config/i386/x86-tune-sched.cc (ix86_issue_rate): Set to 8.
* config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Add Nova
Lake.
* doc/invoke.texi: Adjust documentation.
---
gcc/common/config/i386/i386-common.cc | 2 +-
gcc/config/i386/driver-i386.cc | 6 +++---
gcc/config/i386/i386.h | 6 +++++-
gcc/config/i386/x86-tune-sched.cc | 3 +++
gcc/config/i386/x86-tune.def | 2 +-
gcc/doc/invoke.texi | 4 ++--
6 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/gcc/common/config/i386/i386-common.cc
b/gcc/common/config/i386/i386-common.cc
index a447a8dd210..96136c5f41f 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -2274,7 +2274,7 @@ const pta processor_alias_table[] =
{"wildcatlake", PROCESSOR_PANTHERLAKE, CPU_HASWELL, PTA_PANTHERLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_PANTHERLAKE), P_PROC_AVX2},
{"novalake", PROCESSOR_NOVALAKE, CPU_HASWELL, PTA_NOVALAKE,
- M_CPU_SUBTYPE (INTEL_COREI7_NOVALAKE), P_PROC_AVX2},
+ M_CPU_SUBTYPE (INTEL_COREI7_NOVALAKE), P_PROC_AVX10_1},
{"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3},
{"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
index 0557df9884f..b54f0af0a2a 100644
--- a/gcc/config/i386/driver-i386.cc
+++ b/gcc/config/i386/driver-i386.cc
@@ -603,6 +603,9 @@ const char *host_detect_local_cpu (int argc, const char
**argv)
/* Assume Diamond Rapids. */
if (has_feature (FEATURE_AMX_FP8))
cpu = "diamondrapids";
+ /* Assume Nova Lake. */
+ else if (has_feature (FEATURE_AVX10_2))
+ cpu = "novalake";
/* Assume Granite Rapids D. */
else if (has_feature (FEATURE_AMX_COMPLEX))
cpu = "graniterapids-d";
@@ -643,9 +646,6 @@ const char *host_detect_local_cpu (int argc, const char
**argv)
/* Assume Clearwater Forest. */
if (has_feature (FEATURE_USER_MSR))
cpu = "clearwaterforest";
- /* Assume Nova Lake. */
- else if (has_feature (FEATURE_PREFETCHI))
- cpu = "novalake";
else if (has_feature (FEATURE_SM3))
{
if (has_feature (FEATURE_KL))
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 94f335f8a95..b93411796af 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2488,7 +2488,11 @@ constexpr wide_int_bitmask PTA_DIAMONDRAPIDS =
PTA_GRANITERAPIDS_D
| PTA_CMPCCXADD | PTA_SHA512 | PTA_SM3 | PTA_SM4 | PTA_AVX10_2
| PTA_APX_F | PTA_AMX_AVX512 | PTA_AMX_FP8 | PTA_AMX_TF32 | PTA_MOVRS
| PTA_AMX_MOVRS;
-constexpr wide_int_bitmask PTA_NOVALAKE = PTA_PANTHERLAKE | PTA_PREFETCHI;
+constexpr wide_int_bitmask PTA_NOVALAKE = PTA_PANTHERLAKE | PTA_PREFETCHI
+ | PTA_AVX512F | PTA_AVX512CD | PTA_AVX512VL | PTA_AVX512BW | PTA_AVX512DQ
+ | PTA_AVX512VBMI | PTA_AVX512IFMA | PTA_AVX512VNNI | PTA_AVX512VBMI2
+ | PTA_AVX512BITALG | PTA_AVX512VPOPCNTDQ | PTA_AVX512FP16 | PTA_AVX512BF16
+ | PTA_AVX10_1 | PTA_AVX10_2 | PTA_APX_F | PTA_MOVRS;
constexpr wide_int_bitmask PTA_BDVER1 = PTA_64BIT | PTA_MMX | PTA_SSE
| PTA_SSE2 | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_POPCNT | PTA_LZCNT
diff --git a/gcc/config/i386/x86-tune-sched.cc
b/gcc/config/i386/x86-tune-sched.cc
index ff9c2683007..11b33382ecb 100644
--- a/gcc/config/i386/x86-tune-sched.cc
+++ b/gcc/config/i386/x86-tune-sched.cc
@@ -110,6 +110,9 @@ ix86_issue_rate (void)
case PROCESSOR_PANTHERLAKE:
return 6;
+ case PROCESSOR_NOVALAKE:
+ return 8;
+
default:
return 1;
}
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
index 3627312bf09..dcd26d59351 100644
--- a/gcc/config/i386/x86-tune.def
+++ b/gcc/config/i386/x86-tune.def
@@ -602,7 +602,7 @@ DEF_TUNE (X86_TUNE_AVX128_OPTIMAL, "avx128_optimal",
m_BDVER | m_BTVER2
/* X86_TUNE_AVX256_OPTIMAL: Use 256-bit AVX instructions instead of 512-bit AVX
instructions in the auto-vectorizer. */
-DEF_TUNE (X86_TUNE_AVX256_OPTIMAL, "avx256_optimal", m_CORE_AVX512)
+DEF_TUNE (X86_TUNE_AVX256_OPTIMAL, "avx256_optimal", m_CORE_AVX512 |
m_NOVALAKE)
/* X86_TUNE_AVX256_AVOID_VEC_PERM: Avoid using 256-bit cross-lane
vector permutation instructions in the auto-vectorizer. */
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 6b3ba12e7dd..63384cec6a0 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -35493,8 +35493,8 @@ SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL,
RDRND, XSAVE, XSAVEC,
XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,
MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU,
VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, AVXIFMA, AVXVNNIINT8,
-AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4 and PREFETCHI
-instruction set support.
+AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4, PREFETCHI, APX_F,
+AVX10.1, AVX10.2 and MOVRS instruction set support.
@item sapphirerapids
@itemx emeraldrapids
--
2.31.1
