gcc/ChangeLog:
* config/loongarch/loongarch-opts.cc: Disable vector, extreme code model
and explicit relocs on LA32.
* config/loongarch/loongarch.cc (loongarch_explicit_relocs_p): Disable
explicit relocs on LA32.
(loongarch_bitint_type_info): Disable BitInt on LA32.
---
gcc/config/loongarch/loongarch-opts.cc | 18 ++++++++++++++++++
gcc/config/loongarch/loongarch.cc | 7 +++++++
2 files changed, 25 insertions(+)
diff --git a/gcc/config/loongarch/loongarch-opts.cc
b/gcc/config/loongarch/loongarch-opts.cc
index 50659f67e0f..4fdb5992467 100644
--- a/gcc/config/loongarch/loongarch-opts.cc
+++ b/gcc/config/loongarch/loongarch-opts.cc
@@ -358,6 +358,12 @@ config_target_isa:
}
}
+ /* TARGET_32BIT and TARGET_64BIT init at the end of this function,
+ can't use here. */
+ if ((t.isa.base == ISA_BASE_LA32 || t.isa.base == ISA_BASE_LA32R)
+ && (t.isa.simd == ISA_EXT_SIMD_LSX || t.isa.simd == ISA_EXT_SIMD_LASX))
+ fatal_error (UNKNOWN_LOCATION, "SIMD is not supported on LA32");
+
/* All SIMD extensions imply a 64-bit FPU:
- silently adjust t.isa.fpu to "fpu64" if it is unconstrained.
- warn if -msingle-float / -msoft-float is on,
@@ -557,7 +563,15 @@ fallback:
case CMODEL_NORMAL:
case CMODEL_MEDIUM:
+ break;
+
case CMODEL_EXTREME:
+ if (t.isa.base == ISA_BASE_LA32 || t.isa.base == ISA_BASE_LA32R)
+ {
+ warning (0, "%qs is not supported, now cmodel is set to %qs",
+ loongarch_cmodel_strings[t.cmodel], "normal");
+ t.cmodel = CMODEL_NORMAL;
+ }
break;
default:
@@ -570,6 +584,10 @@ fallback:
/* Cleanup and return. */
obstack_free (&msg_obstack, NULL);
*target = t;
+
+ /* TODO: mexplicit-relocs support for LA32. */
+ if (TARGET_32BIT)
+ la_opt_explicit_relocs = EXPLICIT_RELOCS_NONE;
}
/* Returns the default ABI for the given instruction set. */
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index f3077f81d5d..a2748a38925 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -2124,6 +2124,9 @@ loongarch_symbolic_constant_p (rtx x, enum
loongarch_symbol_type *symbol_type)
bool
loongarch_explicit_relocs_p (enum loongarch_symbol_type type)
{
+ if (TARGET_32BIT)
+ return false;
+
if (la_opt_explicit_relocs != EXPLICIT_RELOCS_AUTO)
return la_opt_explicit_relocs == EXPLICIT_RELOCS_ALWAYS;
@@ -11234,6 +11237,10 @@ loongarch_c_mode_for_suffix (char suffix)
bool
loongarch_bitint_type_info (int n, struct bitint_info *info)
{
+ /* LA32 not support BitInt. */
+ if (TARGET_32BIT)
+ return false;
+
if (n <= 8)
info->limb_mode = QImode;
else if (n <= 16)
--
2.34.1
