[PATCH v2 1/2] Match: Add unsigned SAT_MUL for form 7

[pan2 . li]

From: Pan Li <pan2...@intel.com>

This patch would like to try to match the the unsigned
SAT_MUL form 7, aka below:

  #define DEF_SAT_U_MUL_FMT_7(NT, WT)             \
  NT __attribute__((noinline))                    \
  sat_u_mul_##NT##_from_##WT##_fmt_7 (NT a, NT b) \
  {                                               \
    WT x = (WT)a * (WT)b;                         \
    NT max = -1;                                  \
    bool overflow_p = x > (WT)(max);              \
    return -(NT)(overflow_p) | (NT)x;             \
  }

while WT is uint128_t, uint64_t, uint32_t and uint16_t, and
NT is uint64_t, uint32_t, uint16_t or uint8_t.

gcc/ChangeLog:

        * match.pd: Add pattern for SAT_MUL form 7 include
        mul and widen_mul.

Signed-off-by: Pan Li <pan2...@intel.com>
---
 gcc/match.pd | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/gcc/match.pd b/gcc/match.pd
index 5618f729637..c8798f2f73a 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -3790,6 +3790,25 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
       bool c2_is_type_precision_p = tree_to_uhwi (@2) == prec;
      }
      (if (c2_is_type_precision_p)))))
+  (match (unsigned_integer_sat_mul @0 @1)
+   /* SAT_U_MUL (X, Y) = {
+       WT x = (WT)a * (WT)b;
+       NT max = -1;
+       bool overflow_p = x > (WT)max;
+       return -(NT)(overflow_p) | (NT)x;
+      } while WT is uint128_t, uint64_t, uint32_t, uint16_t,
+       and T is uint64_t, uint32_t, uint16_t, uint8_t.  */
+   (bit_ior:c (negate (convert (gt @3 INTEGER_CST@2)))
+             (convert (usmul_widen_mult@3 @0 @1)))
+   (if (types_match (type, @0, @1))
+    (with
+     {
+      unsigned prec = TYPE_PRECISION (type);
+      unsigned widen_prec = TYPE_PRECISION (TREE_TYPE (@3));
+      wide_int max = wi::mask (prec, false, widen_prec);
+      bool c2_is_max_p = wi::eq_p (wi::to_wide (@2), max);
+     }
+     (if (c2_is_max_p)))))
 )
 
 /* The boundary condition for case 10: IMM = 1:
-- 
2.43.0