Hi!
On Tue, Nov 25, 2025 at 11:15:06AM +0530, Manjunath S Matti wrote:
> This patch looks good to me.
>
> This patch significantly simplifies the logic, by directly using vcmpnez
>
> which appears to achieve the same result!
>
>
> Thanks for fixing this.
>
> I think we will wait for Segher comments
Which would not happen at all, because the patch was not sent to me!
I'll try to review it here, now, a bit, but please in the future follow
the rules and cc: maintainers on all patches that touch their areas.
> > This patch removes redundant vector compare instructions and logic
> > from the vec_first_mismatch_or_eos_index intrinsic.
> > Currently, GCC generates extra vcmpneb instructions and additional
> > masking logic (xxland, xxlorc) to handle EOS and mismatch comparisons.
> > However, a single vcmpnezb instruction already suffices, as it covers
> > both By eliminating the redundant comparisons (vcmpneb) and the
> > associated logic (xxland/xxlorc) we produce shorter,
> > more efficient code.
I had to look up the most important fact (or *only* important fact, you
could say even): these insns requyire ISA 3.0, but so do these builtins.
> > PR target/116004
> > * config/rs6000/vsx.md (first_mismatch_or_eos_index): Remove
> > redundant
> > emit_insns.
Why was it ever written this way, any clue?
> > index dd3573b80..cac1e6080 100644
> > --- a/gcc/config/rs6000/vsx.md
> > +++ b/gcc/config/rs6000/vsx.md
> > @@ -5668,29 +5668,13 @@
> > "TARGET_P9_VECTOR"
> > {
> > int sh;
> > - rtx cmpz1_result = gen_reg_rtx (<MODE>mode);
> > - rtx cmpz2_result = gen_reg_rtx (<MODE>mode);
> > - rtx cmpz_result = gen_reg_rtx (<MODE>mode);
> > - rtx not_cmpz_result = gen_reg_rtx (<MODE>mode);
> > - rtx and_result = gen_reg_rtx (<MODE>mode);
> > rtx result = gen_reg_rtx (<MODE>mode);
The indentation is wrong here. That of the opening brace looks to be
wrong already?
So, please send a patch with those things fixed. Thanks!
Segher
