This is v2, mostly unchanged from v1 apart from a few test suite adjustments.
It should apply cleanly now.  The ICE in the vectorizer with these patches has
since been addressed but there are still a few non-execution failures left.
I inspected most of them and they look harmless to me.  Mostly scans where we 
expect something slightly different or tests that don't expect length-based
vectorization in their context.  Also, one more dynamic lmul failure.

Regtested on rv64gcv_zvl512b.

Robin Dapp (6):
  RISC-V: Change gather/scatter iterators.
  RISC-V: Rename vector-mode related functions.
  RISC-V: Add VLS modes to autovec iterators.
  RISC-V: Generic vec_extract via subreg.
  RISC-V: Generic vec_set via subreg.
  RISC-V: Enable VLS select_vl loop control.

 gcc/config/riscv/autovec-opt.md               |   22 +-
 gcc/config/riscv/autovec.md                   |  321 ++--
 gcc/config/riscv/riscv-avlprop.cc             |    2 +-
 gcc/config/riscv/riscv-protos.h               |    6 +-
 gcc/config/riscv/riscv-selftests.cc           |    8 +-
 gcc/config/riscv/riscv-v.cc                   |  349 +++-
 .../riscv/riscv-vector-builtins-bases.cc      |   66 +-
 gcc/config/riscv/riscv-vector-builtins.cc     |    4 +-
 gcc/config/riscv/riscv-vector-costs.cc        |   22 +-
 gcc/config/riscv/riscv.cc                     |  104 +-
 gcc/config/riscv/vector-crypto.md             |  172 +-
 gcc/config/riscv/vector-iterators.md          | 1519 ++++++++++++++++-
 gcc/config/riscv/vector.md                    |  186 +-
 .../autovec/gather-scatter/strided_store-2.c  |    2 +-
 .../riscv/rvv/autovec/param-autovec-mode.c    |    2 +-
 .../riscv/rvv/autovec/partial/select_vl-2.c   |    4 +-
 .../gcc.target/riscv/rvv/autovec/zve64d-1.c   |    2 +-
 .../gcc.target/riscv/rvv/autovec/zve64f-1.c   |    2 +-
 18 files changed, 2215 insertions(+), 578 deletions(-)

-- 
2.51.1

Reply via email to