From: Robin Dapp <[email protected]>

This is v3 with the vec_set and the select_vl patches removed.
As noted on the list, vec_set had some unintended spilling side effects that I 
didn't notice before.  The select_vl patch didn't show the intended
codegen improvements and the benefits of a length-controlled loop are
already available through the added VLS modes in patch 3.

It might be useful to have an additional control flag that enables or disables 
length control for VLS modes but that's not part of this series.  I guess we 
should talk about that in the patchwork sync meeting.

Most changes from v2 address reviewer comments, i.e. adding tests as well as 
clarifying comments.

I regtested the series on rv64gcv_zvl512b with a bit of fallout.  As noted 
before all of it is harmless and doesn't constitute code-gen degradation so
I'm inclined to go ahead with it.

Robin Dapp (4):
  RISC-V: Change gather/scatter iterators.
  RISC-V: Rename vector-mode related functions.
  RISC-V: Add VLS modes to autovec iterators.
  RISC-V: Generic vec_extract via subreg.

 gcc/config/riscv/autovec-opt.md               |   22 +-
 gcc/config/riscv/autovec.md                   |  310 ++--
 gcc/config/riscv/riscv-avlprop.cc             |    2 +-
 gcc/config/riscv/riscv-protos.h               |    6 +-
 gcc/config/riscv/riscv-selftests.cc           |    8 +-
 gcc/config/riscv/riscv-v.cc                   |  250 ++-
 .../riscv/riscv-vector-builtins-bases.cc      |   66 +-
 gcc/config/riscv/riscv-vector-builtins.cc     |    4 +-
 gcc/config/riscv/riscv-vector-costs.cc        |   22 +-
 gcc/config/riscv/riscv.cc                     |  104 +-
 gcc/config/riscv/vector-crypto.md             |  172 +-
 gcc/config/riscv/vector-iterators.md          | 1519 ++++++++++++++++-
 gcc/config/riscv/vector.md                    |  186 +-
 .../autovec/gather-scatter/strided_store-2.c  |    3 +-
 .../riscv/rvv/autovec/param-autovec-mode.c    |    2 +-
 .../riscv/rvv/autovec/partial/select_vl-2.c   |    4 +-
 .../riscv/rvv/autovec/subreg-extract.c        |   19 +
 .../gcc.target/riscv/rvv/autovec/zve64d-1.c   |    5 +-
 .../gcc.target/riscv/rvv/autovec/zve64f-1.c   |    5 +-
 19 files changed, 2133 insertions(+), 576 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/subreg-extract.c

-- 
2.51.1

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