On 19/01/2026 19:25, Alexandre Oliva wrote:
> 
> The late-combine pass enabled some of the vdup.32 instructions
> expected in crypto-vsha1*_u32 tests to use d registers, so accept them
> as well.
> 
> While at that, drop the excess + after ] in d register matches in
> vmov.32 instructions.
> 
> Regstrapped on x86_64-linux-gnu.  Also tested with aarch64-elf and
> arm-eabi with gcc-15.  Ok to install?
> 
> 
> for  gcc/testsuite/ChangeLog
> 
>       * gcc.target/arm/crypto-vsha1cq_u32.c: Accept d regs in
>       vdup.32.  Drop extraneous + after ] in vmov.32 pattern.
>       * gcc.target/arm/crypto-vsha1h_u32.c: Likewise.
>       * gcc.target/arm/crypto-vsha1mq_u32.c: Likewise.
>       * gcc.target/arm/crypto-vsha1pq_u32.c: Likewise.

OK.

R.

> ---
>  gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c |    4 ++--
>  gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c  |    4 ++--
>  gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c |    4 ++--
>  gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c |    4 ++--
>  4 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c 
> b/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c
> index 0cadd19c4dcca..6a64b61299bf7 100644
> --- a/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c
> @@ -31,5 +31,5 @@ uint32_t foo (void)
>  TEST_SHA1C_VEC_SELECT (GET_LANE)
>  
>  /* { dg-final { scan-assembler-times {sha1c.32\tq[0-9]+, q[0-9]+} 5 } } */
> -/* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, r[0-9]+} 4 } } */
> -/* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]+} 
> 3 } } */
> +/* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, 
> (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 } } */
> +/* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 
> } } */
> diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c 
> b/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c
> index 33af705c59e39..accf83e88c43f 100644
> --- a/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c
> @@ -27,5 +27,5 @@ uint32_t foo (void)
>  TEST_SHA1H_VEC_SELECT (GET_LANE)
>  
>  /* { dg-final { scan-assembler-times {sha1h.32\tq[0-9]+, q[0-9]+} 5 } } */
> -/* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, r[0-9]+} 4 } } */
> -/* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]+} 
> 3 } } */
> +/* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, 
> (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 } } */
> +/* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 
> } } */
> diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c 
> b/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c
> index bdd1c4f331595..9d6aa45a06745 100644
> --- a/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c
> @@ -31,5 +31,5 @@ uint32_t foo (void)
>  TEST_SHA1M_VEC_SELECT (GET_LANE)
>  
>  /* { dg-final { scan-assembler-times {sha1m.32\tq[0-9]+, q[0-9]+} 5 } } */
> -/* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, r[0-9]+} 4 } } */
> -/* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]+} 
> 3 } } */
> +/* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, 
> (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 } } */
> +/* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 
> } } */
> diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c 
> b/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c
> index d48a07c6fa4ea..5fbcad2d2095f 100644
> --- a/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c
> @@ -31,5 +31,5 @@ uint32_t foo (void)
>  TEST_SHA1P_VEC_SELECT (GET_LANE)
>  
>  /* { dg-final { scan-assembler-times {sha1p.32\tq[0-9]+, q[0-9]+} 5 } } */
> -/* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, r[0-9]+} 4 } } */
> -/* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]+} 
> 3 } } */
> +/* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, 
> (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 } } */
> +/* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 
> } } */
> 

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