SVE2.2 and SME2.2 extensions introduce the following changes related to
COMPACT/EXPAND instructions:
- COMPACT (Copy Active vector elements to lower-numbered elements) for 8-
and 16-bit-wide vector elements: these variants of an existing instruction
are new in SVE2.2 (or in streaming mode, SME2.2)
- COMPACT (Copy Active vector elements to lower-numbered elements) for 32-
and 64-bit-wide vector elements: previously only legal in non-streaming
mode, these variants are now allowed in streaming mode under SME2.2
- EXPAND (Copy lower-numbered vector elements to Active elements): this
instruction is new in SVE2.2 (or in streaming mode, SME2.2)
The new supporting intrinsics are documented in the ACLE manual [0] and
are as follows:
sv{uint,int}{8,16}_t svcompact[_{u,s}{8,16}]
(svbool_t pg, sv{uint,int}{8,16}_t zn);
sv{mfloat8,bfloat16,float16}_t svcompact[_{mf8,bf16,f16}]
(svbool_t pg, sv{mfloat8,bfloat16,float16}_t zn);
sv{uint,int}{8,16,32,64}_t svexpand[_{u,s}{8,16,32,64}]
(svbool_t pg, sv{uint,int}{8,16,32,64}_t zn);
svfloat{16,32,64}_t svexpand[_f{16,32,64}]
(svbool_t pg, svfloat{16,32,64}_t zn);
sv{mfloat8,bfloat16}_t svexpand[_{mf8,bf16}]
(svbool_t pg, sv{mfloat8,bfloat16}_t zn);
This patch implements the above changes throughout the SVE builtin
description files and aarch64-sve{,2}.md.
New ASM tests have been added as usual; also, an adjustment has been made
to aarch64-ssve.exp in g++.target/ to reflect the fact that the svcompact
intrinsic is not nonstreaming-only anymore.
[0] https://github.com/ARM-software/acle
gcc/ChangeLog:
* config/aarch64/aarch64-sve-builtins-base.cc (class svexpand_impl):
Define new SVE function base.
* config/aarch64/aarch64-sve-builtins-base.def (svcompact): Allow
execution in streaming mode when SME2p2 is enabled.
* config/aarch64/aarch64-sve-builtins-base.h (svexpand): Declare
new SVE function base.
* config/aarch64/aarch64-sve-builtins-sve2.def (svcompact): Define
new SVE function.
(svexpand): Likewise.
* config/aarch64/aarch64-sve.md (@aarch64_sve_compact<mode>):
Enable 32- and 64-bit element variants under SME2p2. New
insn pattern for 8- and 16-bit elements.
(@aarch64_sve_expand<mode>): New insn pattern.
* config/aarch64/aarch64.h (TARGET_SVE_OR_SME2p2): New macro.
* config/aarch64/aarch64.md (UNSPEC_SVE_EXPAND): New UNSPEC.
gcc/testsuite/ChangeLog:
* g++.target/aarch64/sve/aarch64-ssve.exp: Add sve2p2 to the
target string. Move svcompact from $nonstreaming_only to
$streaming_ok.
* gcc.target/aarch64/sve2/acle/asm/compact_bf16.c: New test.
* gcc.target/aarch64/sve2/acle/asm/compact_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_mf8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/compact_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_bf16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_f32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_f64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_mf8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_s16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/expand_u8.c: Likewise.
---
.../aarch64/aarch64-sve-builtins-base.cc | 14 +++++++++
.../aarch64/aarch64-sve-builtins-base.def | 5 +++-
.../aarch64/aarch64-sve-builtins-base.h | 1 +
.../aarch64/aarch64-sve-builtins-sve2.def | 2 ++
gcc/config/aarch64/aarch64-sve.md | 29 +++++++++++++++++--
gcc/config/aarch64/aarch64.h | 4 +++
gcc/config/aarch64/aarch64.md | 1 +
.../g++.target/aarch64/sve/aarch64-ssve.exp | 4 +--
.../aarch64/sve2/acle/asm/compact_bf16.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/compact_f32.c | 22 ++++++++++++++
.../aarch64/sve2/acle/asm/compact_f64.c | 22 ++++++++++++++
.../aarch64/sve2/acle/asm/compact_mf8.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/compact_s16.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/compact_s32.c | 22 ++++++++++++++
.../aarch64/sve2/acle/asm/compact_s64.c | 22 ++++++++++++++
.../aarch64/sve2/acle/asm/compact_s8.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/compact_u16.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/compact_u32.c | 22 ++++++++++++++
.../aarch64/sve2/acle/asm/compact_u64.c | 22 ++++++++++++++
.../aarch64/sve2/acle/asm/compact_u8.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_bf16.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_f32.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_f64.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_mf8.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_s16.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_s32.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_s64.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_s8.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_u16.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_u32.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_u64.c | 28 ++++++++++++++++++
.../aarch64/sve2/acle/asm/expand_u8.c | 28 ++++++++++++++++++
32 files changed, 691 insertions(+), 5 deletions(-)
create mode 100644
gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_bf16.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_f32.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_f64.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_mf8.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s16.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s32.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s64.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s8.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u16.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u32.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u64.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u8.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_bf16.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_f32.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_f64.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_mf8.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s16.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s32.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s64.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s8.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u16.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u32.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u64.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u8.c
diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
index f2028c27172..4885b0ec48a 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
@@ -1291,6 +1291,19 @@ public:
}
};
+class svexpand_impl
+ : public QUIET_CODE_FOR_MODE0 (aarch64_sve_expand)
+{
+public:
+ gimple *
+ fold (gimple_folder &f) const override
+ {
+ if (is_pfalse (gimple_call_arg (f.call, 0)))
+ return f.fold_call_to (build_zero_cst (TREE_TYPE (f.lhs)));
+ return NULL;
+ }
+};
+
/* Implements svextb, svexth and svextw. */
class svext_bhw_impl : public function_base
{
@@ -3581,6 +3594,7 @@ FUNCTION (svdupq_lane, svdupq_lane_impl,)
FUNCTION (sveor, rtx_code_function, (XOR, XOR, -1))
FUNCTION (sveorv, sveorv_impl,)
FUNCTION (svexpa, unspec_based_function, (-1, -1, UNSPEC_FEXPA))
+FUNCTION (svexpand, svexpand_impl,)
FUNCTION (svext, QUIET_CODE_FOR_MODE0 (aarch64_sve_ext),)
FUNCTION (svextb, svext_bhw_impl, (QImode))
FUNCTION (svexth, svext_bhw_impl, (HImode))
diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.def
b/gcc/config/aarch64/aarch64-sve-builtins-base.def
index 9914e060f4d..c1e00a51b7b 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.def
+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.def
@@ -274,7 +274,6 @@ DEF_SVE_FUNCTION (svadrb, adr_offset, none, none)
DEF_SVE_FUNCTION (svadrd, adr_index, none, none)
DEF_SVE_FUNCTION (svadrh, adr_index, none, none)
DEF_SVE_FUNCTION (svadrw, adr_index, none, none)
-DEF_SVE_FUNCTION (svcompact, unary, sd_data, implicit)
DEF_SVE_FUNCTION (svexpa, unary_uint, all_float, none)
DEF_SVE_FUNCTION (svld1_gather, load_gather_sv, sd_data, implicit)
DEF_SVE_FUNCTION (svld1_gather, load_gather_vs, sd_data, implicit)
@@ -374,3 +373,7 @@ DEF_SVE_FUNCTION (svuzp2q, binary, all_data, none)
DEF_SVE_FUNCTION (svzip1q, binary, all_data, none)
DEF_SVE_FUNCTION (svzip2q, binary, all_data, none)
#undef REQUIRED_EXTENSIONS
+
+#define REQUIRED_EXTENSIONS sve_and_sme (0, AARCH64_FL_SME2p2)
+DEF_SVE_FUNCTION (svcompact, unary, sd_data, implicit)
+#undef REQUIRED_EXTENSIONS
diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.h
b/gcc/config/aarch64/aarch64-sve-builtins-base.h
index dc443524050..1ae2483f268 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.h
+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.h
@@ -105,6 +105,7 @@ namespace aarch64_sve
extern const function_base *const sveor;
extern const function_base *const sveorv;
extern const function_base *const svexpa;
+ extern const function_base *const svexpand;
extern const function_base *const svext;
extern const function_base *const svextb;
extern const function_base *const svexth;
diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sve2.def
b/gcc/config/aarch64/aarch64-sve-builtins-sve2.def
index 6ecfc2a45c1..8b624d0946f 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-sve2.def
+++ b/gcc/config/aarch64/aarch64-sve-builtins-sve2.def
@@ -305,6 +305,8 @@ DEF_SVE_FUNCTION (svcvtlt, unary_convert, cvt_long, z)
DEF_SVE_FUNCTION (svcvtnt, unary_convert_narrowt, cvt_narrow, z)
DEF_SVE_FUNCTION (svcvtnt, unary_convert_narrowt, cvt_bfloat, z)
DEF_SVE_FUNCTION (svcvtxnt, unary_convert_narrowt, cvt_narrow_s, z)
+DEF_SVE_FUNCTION (svcompact, unary, bh_data, implicit)
+DEF_SVE_FUNCTION (svexpand, unary, all_data, implicit)
DEF_SVE_FUNCTION (svfirstp, count_pred, all_pred, implicit)
DEF_SVE_FUNCTION (svlastp, count_pred, all_pred, implicit)
DEF_SVE_FUNCTION (svrint32x, unary, sd_float, mxz)
diff --git a/gcc/config/aarch64/aarch64-sve.md
b/gcc/config/aarch64/aarch64-sve.md
index b6044adb5fb..a910c5b3435 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -10245,7 +10245,9 @@
;; ---- [INT,FP] Special-purpose unary permutes
;; -------------------------------------------------------------------------
;; Includes:
-;; - COMPACT
+;; - COMPACT word/doubleword
+;; - COMPACT byte/halfword (SVE2p2)
+;; - EXPAND (SVE2p2)
;; - DUP
;; - REV
;; -------------------------------------------------------------------------
@@ -10257,11 +10259,34 @@
[(match_operand:<VPRED> 1 "register_operand" "Upl")
(match_operand:SVE_FULL_SD 2 "register_operand" "w")]
UNSPEC_SVE_COMPACT))]
- "TARGET_SVE && TARGET_NON_STREAMING"
+ "TARGET_SVE_OR_SME2p2"
+ "compact\t%0.<Vetype>, %1, %2.<Vetype>"
+ [(set_attr "sve_type" "sve_int_extract")]
+)
+
+(define_insn "@aarch64_sve_compact<mode>"
+ [(set (match_operand:SVE_FULL_BH 0 "register_operand" "=w")
+ (unspec:SVE_FULL_BH
+ [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ (match_operand:SVE_FULL_BH 2 "register_operand" "w")]
+ UNSPEC_SVE_COMPACT))]
+ "TARGET_SVE2p2_OR_SME2p2"
"compact\t%0.<Vetype>, %1, %2.<Vetype>"
[(set_attr "sve_type" "sve_int_extract")]
)
+;; Expand into active elements and set inactive elements to zero.
+(define_insn "@aarch64_sve_expand<mode>"
+ [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
+ (unspec:SVE_FULL
+ [(match_operand:<VPRED> 1 "register_operand" "Upl")
+ (match_operand:SVE_FULL 2 "register_operand" "w")]
+ UNSPEC_SVE_EXPAND))]
+ "TARGET_SVE2p2_OR_SME2p2"
+ "expand\t%0.<Vetype>, %1, %2.<Vetype>"
+ [(set_attr "sve_type" "sve_int_extract")]
+)
+
;; Duplicate one element of a vector.
(define_insn "@aarch64_sve_dup_lane<mode>"
[(set (match_operand:SVE_ALL 0 "register_operand" "=w")
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 5d4fc313163..af6d793bd54 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -535,6 +535,10 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED
/* Combinatorial tests. */
+#define TARGET_SVE_OR_SME2p2 \
+ ((TARGET_SVE || TARGET_STREAMING) \
+ && (TARGET_SME2p2 || TARGET_NON_STREAMING))
+
#define TARGET_SVE2_OR_SME2 \
((TARGET_SVE2 || TARGET_STREAMING) \
&& (TARGET_SME2 || TARGET_NON_STREAMING))
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index cfceef91fbb..6541fa84f88 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -400,6 +400,7 @@
UNSPEC_SVE_PREFETCH
UNSPEC_SVE_PREFETCH_GATHER
UNSPEC_SVE_COMPACT
+ UNSPEC_SVE_EXPAND
UNSPEC_SVE_SPLICE
UNSPEC_GEN_TAG ; Generate a 4-bit MTE tag.
UNSPEC_GEN_TAG_RND ; Generate a random 4-bit MTE tag.
diff --git a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp
b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp
index 4bd22455d9d..e5dbc649449 100644
--- a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp
+++ b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp
@@ -37,7 +37,7 @@ gcc_parallel_test_enable 0
set preamble {
#include <arm_sve.h>
-#pragma GCC target
"+i8mm+f32mm+f64mm+sve2+sve2-bitperm+sve2-sm4+sve2-aes+sve2-sha3+sme+ssve-bitperm"
+#pragma GCC target
"+i8mm+f32mm+f64mm+sve2+sve2-bitperm+sve2-sm4+sve2-aes+sve2-sha3+sme+ssve-bitperm+sve2p2"
extern svbool_t &pred;
@@ -148,6 +148,7 @@ set streaming_ok {
u8 = svbdep (u8, u8)
u8 = svbext (u8, u8)
u8 = svbgrp (u8, u8)
+ u32 = svcompact (pred, u32)
}
# This order follows the list in the SME manual.
@@ -165,7 +166,6 @@ set nonstreaming_only {
u8 = svaesimc (u8)
u8 = svaesmc (u8)
f32 = svbfmmla (f32, bf16, bf16)
- u32 = svcompact (pred, u32)
f32 = svadda (pred, 1.0f, f32)
f32 = svexpa (u32)
f32 = svmmla (f32, f32, f32)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_bf16.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_bf16.c
new file mode 100644
index 00000000000..6bdf11f8c1e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_bf16.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** compact_bf16_tied1:
+** compact z0\.h, p0, z0\.h
+** ret
+*/
+TEST_UNIFORM_Z (compact_bf16_tied1, svbfloat16_t,
+ z0 = svcompact_bf16 (p0, z0),
+ z0 = svcompact (p0, z0))
+
+/*
+** compact_bf16_untied:
+** compact z0\.h, p0, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (compact_bf16_untied, svbfloat16_t,
+ z0 = svcompact_bf16 (p0, z1),
+ z0 = svcompact (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_f32.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_f32.c
new file mode 100644
index 00000000000..be6cd87bd23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_f32.c
@@ -0,0 +1,22 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-skip-if "" { *-*-* } { "" } { "-DSTREAMING_COMPATIBLE" } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sme2p2"
+
+#include "../../../sve/acle/asm/compact_f32.c"
+
+/*
+** compact_f32_tied1:
+** compact z0\.s, p0, z0\.s
+** ret
+*/
+
+/*
+** compact_f32_untied:
+** compact z0\.s, p0, z1\.s
+** ret
+*/
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_f64.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_f64.c
new file mode 100644
index 00000000000..131364b84a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_f64.c
@@ -0,0 +1,22 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-skip-if "" { *-*-* } { "" } { "-DSTREAMING_COMPATIBLE" } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sme2p2"
+
+#include "../../../sve/acle/asm/compact_f64.c"
+
+/*
+** compact_f64_tied1:
+** compact z0\.d, p0, z0\.d
+** ret
+*/
+
+/*
+** compact_f64_untied:
+** compact z0\.d, p0, z1\.d
+** ret
+*/
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_mf8.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_mf8.c
new file mode 100644
index 00000000000..07490dd04a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_mf8.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** compact_mf8_tied1:
+** compact z0\.b, p0, z0\.b
+** ret
+*/
+TEST_UNIFORM_Z (compact_mf8_tied1, svmfloat8_t,
+ z0 = svcompact_mf8 (p0, z0),
+ z0 = svcompact (p0, z0))
+
+/*
+** compact_mf8_untied:
+** compact z0\.b, p0, z1\.b
+** ret
+*/
+TEST_UNIFORM_Z (compact_mf8_untied, svmfloat8_t,
+ z0 = svcompact_mf8 (p0, z1),
+ z0 = svcompact (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s16.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s16.c
new file mode 100644
index 00000000000..f35ad950452
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s16.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** compact_s16_tied1:
+** compact z0\.h, p0, z0\.h
+** ret
+*/
+TEST_UNIFORM_Z (compact_s16_tied1, svint16_t,
+ z0 = svcompact_s16 (p0, z0),
+ z0 = svcompact (p0, z0))
+
+/*
+** compact_s16_untied:
+** compact z0\.h, p0, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (compact_s16_untied, svint16_t,
+ z0 = svcompact_s16 (p0, z1),
+ z0 = svcompact (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s32.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s32.c
new file mode 100644
index 00000000000..40ff773008a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s32.c
@@ -0,0 +1,22 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-skip-if "" { *-*-* } { "" } { "-DSTREAMING_COMPATIBLE" } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sme2p2"
+
+#include "../../../sve/acle/asm/compact_s32.c"
+
+/*
+** compact_s32_tied1:
+** compact z0\.s, p0, z0\.s
+** ret
+*/
+
+/*
+** compact_s32_untied:
+** compact z0\.s, p0, z1\.s
+** ret
+*/
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s64.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s64.c
new file mode 100644
index 00000000000..d4c747a937b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s64.c
@@ -0,0 +1,22 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-skip-if "" { *-*-* } { "" } { "-DSTREAMING_COMPATIBLE" } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sme2p2"
+
+#include "../../../sve/acle/asm/compact_s64.c"
+
+/*
+** compact_s64_tied1:
+** compact z0\.d, p0, z0\.d
+** ret
+*/
+
+/*
+** compact_s64_untied:
+** compact z0\.d, p0, z1\.d
+** ret
+*/
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s8.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s8.c
new file mode 100644
index 00000000000..f3cd944a1dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_s8.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** compact_s8_tied1:
+** compact z0\.b, p0, z0\.b
+** ret
+*/
+TEST_UNIFORM_Z (compact_s8_tied1, svint8_t,
+ z0 = svcompact_s8 (p0, z0),
+ z0 = svcompact (p0, z0))
+
+/*
+** compact_s8_untied:
+** compact z0\.b, p0, z1\.b
+** ret
+*/
+TEST_UNIFORM_Z (compact_s8_untied, svint8_t,
+ z0 = svcompact_s8 (p0, z1),
+ z0 = svcompact (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u16.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u16.c
new file mode 100644
index 00000000000..62f0f20be1d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u16.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** compact_u16_tied1:
+** compact z0\.h, p0, z0\.h
+** ret
+*/
+TEST_UNIFORM_Z (compact_u16_tied1, svuint16_t,
+ z0 = svcompact_u16 (p0, z0),
+ z0 = svcompact (p0, z0))
+
+/*
+** compact_u16_untied:
+** compact z0\.h, p0, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (compact_u16_untied, svuint16_t,
+ z0 = svcompact_u16 (p0, z1),
+ z0 = svcompact (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u32.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u32.c
new file mode 100644
index 00000000000..1853af16898
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u32.c
@@ -0,0 +1,22 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-skip-if "" { *-*-* } { "" } { "-DSTREAMING_COMPATIBLE" } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sme2p2"
+
+#include "../../../sve/acle/asm/compact_u32.c"
+
+/*
+** compact_u32_tied1:
+** compact z0\.s, p0, z0\.s
+** ret
+*/
+
+/*
+** compact_u32_untied:
+** compact z0\.s, p0, z1\.s
+** ret
+*/
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u64.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u64.c
new file mode 100644
index 00000000000..2f74bd1f3cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u64.c
@@ -0,0 +1,22 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-skip-if "" { *-*-* } { "" } { "-DSTREAMING_COMPATIBLE" } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sme2p2"
+
+#include "../../../sve/acle/asm/compact_u64.c"
+
+/*
+** compact_u64_tied1:
+** compact z0\.d, p0, z0\.d
+** ret
+*/
+
+/*
+** compact_u64_untied:
+** compact z0\.d, p0, z1\.d
+** ret
+*/
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u8.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u8.c
new file mode 100644
index 00000000000..4ca16b98522
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/compact_u8.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** compact_u8_tied1:
+** compact z0\.b, p0, z0\.b
+** ret
+*/
+TEST_UNIFORM_Z (compact_u8_tied1, svuint8_t,
+ z0 = svcompact_u8 (p0, z0),
+ z0 = svcompact (p0, z0))
+
+/*
+** compact_u8_untied:
+** compact z0\.b, p0, z1\.b
+** ret
+*/
+TEST_UNIFORM_Z (compact_u8_untied, svuint8_t,
+ z0 = svcompact_u8 (p0, z1),
+ z0 = svcompact (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_bf16.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_bf16.c
new file mode 100644
index 00000000000..86829eb54ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_bf16.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_bf16_tied1:
+** expand z0\.h, p0, z0\.h
+** ret
+*/
+TEST_UNIFORM_Z (expand_bf16_tied1, svbfloat16_t,
+ z0 = svexpand_bf16 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_bf16_untied:
+** expand z0\.h, p0, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (expand_bf16_untied, svbfloat16_t,
+ z0 = svexpand_bf16 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_f32.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_f32.c
new file mode 100644
index 00000000000..09d3a4f9af8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_f32.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_f32_tied1:
+** expand z0\.s, p0, z0\.s
+** ret
+*/
+TEST_UNIFORM_Z (expand_f32_tied1, svfloat32_t,
+ z0 = svexpand_f32 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_f32_untied:
+** expand z0\.s, p0, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (expand_f32_untied, svfloat32_t,
+ z0 = svexpand_f32 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_f64.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_f64.c
new file mode 100644
index 00000000000..e4dcdbab449
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_f64.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_f64_tied1:
+** expand z0\.d, p0, z0\.d
+** ret
+*/
+TEST_UNIFORM_Z (expand_f64_tied1, svfloat64_t,
+ z0 = svexpand_f64 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_f64_untied:
+** expand z0\.d, p0, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (expand_f64_untied, svfloat64_t,
+ z0 = svexpand_f64 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_mf8.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_mf8.c
new file mode 100644
index 00000000000..55b94e61435
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_mf8.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_mf8_tied1:
+** expand z0\.b, p0, z0\.b
+** ret
+*/
+TEST_UNIFORM_Z (expand_mf8_tied1, svmfloat8_t,
+ z0 = svexpand_mf8 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_mf8_untied:
+** expand z0\.b, p0, z1\.b
+** ret
+*/
+TEST_UNIFORM_Z (expand_mf8_untied, svmfloat8_t,
+ z0 = svexpand_mf8 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s16.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s16.c
new file mode 100644
index 00000000000..b939192d280
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s16.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_s16_tied1:
+** expand z0\.h, p0, z0\.h
+** ret
+*/
+TEST_UNIFORM_Z (expand_s16_tied1, svint16_t,
+ z0 = svexpand_s16 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_s16_untied:
+** expand z0\.h, p0, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (expand_s16_untied, svint16_t,
+ z0 = svexpand_s16 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s32.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s32.c
new file mode 100644
index 00000000000..54785d647ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s32.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_s32_tied1:
+** expand z0\.s, p0, z0\.s
+** ret
+*/
+TEST_UNIFORM_Z (expand_s32_tied1, svint32_t,
+ z0 = svexpand_s32 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_s32_untied:
+** expand z0\.s, p0, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (expand_s32_untied, svint32_t,
+ z0 = svexpand_s32 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s64.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s64.c
new file mode 100644
index 00000000000..369308169e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s64.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_s64_tied1:
+** expand z0\.d, p0, z0\.d
+** ret
+*/
+TEST_UNIFORM_Z (expand_s64_tied1, svint64_t,
+ z0 = svexpand_s64 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_s64_untied:
+** expand z0\.d, p0, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (expand_s64_untied, svint64_t,
+ z0 = svexpand_s64 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s8.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s8.c
new file mode 100644
index 00000000000..ba8e0cb910a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_s8.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_s8_tied1:
+** expand z0\.b, p0, z0\.b
+** ret
+*/
+TEST_UNIFORM_Z (expand_s8_tied1, svint8_t,
+ z0 = svexpand_s8 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_s8_untied:
+** expand z0\.b, p0, z1\.b
+** ret
+*/
+TEST_UNIFORM_Z (expand_s8_untied, svint8_t,
+ z0 = svexpand_s8 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u16.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u16.c
new file mode 100644
index 00000000000..0323a71ed61
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u16.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_u16_tied1:
+** expand z0\.h, p0, z0\.h
+** ret
+*/
+TEST_UNIFORM_Z (expand_u16_tied1, svuint16_t,
+ z0 = svexpand_u16 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_u16_untied:
+** expand z0\.h, p0, z1\.h
+** ret
+*/
+TEST_UNIFORM_Z (expand_u16_untied, svuint16_t,
+ z0 = svexpand_u16 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u32.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u32.c
new file mode 100644
index 00000000000..a5c5d58d97c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u32.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_u32_tied1:
+** expand z0\.s, p0, z0\.s
+** ret
+*/
+TEST_UNIFORM_Z (expand_u32_tied1, svuint32_t,
+ z0 = svexpand_u32 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_u32_untied:
+** expand z0\.s, p0, z1\.s
+** ret
+*/
+TEST_UNIFORM_Z (expand_u32_untied, svuint32_t,
+ z0 = svexpand_u32 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u64.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u64.c
new file mode 100644
index 00000000000..3193afb1829
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u64.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_u64_tied1:
+** expand z0\.d, p0, z0\.d
+** ret
+*/
+TEST_UNIFORM_Z (expand_u64_tied1, svuint64_t,
+ z0 = svexpand_u64 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_u64_untied:
+** expand z0\.d, p0, z1\.d
+** ret
+*/
+TEST_UNIFORM_Z (expand_u64_untied, svuint64_t,
+ z0 = svexpand_u64 (p0, z1),
+ z0 = svexpand (p0, z1))
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u8.c
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u8.c
new file mode 100644
index 00000000000..1c89138a572
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/expand_u8.c
@@ -0,0 +1,28 @@
+/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */
+/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */
+/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
+
+#include "test_sve_acle.h"
+
+#pragma GCC target "+sve2p2"
+#ifdef STREAMING_COMPATIBLE
+#pragma GCC target "+sme2p2"
+#endif
+
+/*
+** expand_u8_tied1:
+** expand z0\.b, p0, z0\.b
+** ret
+*/
+TEST_UNIFORM_Z (expand_u8_tied1, svuint8_t,
+ z0 = svexpand_u8 (p0, z0),
+ z0 = svexpand (p0, z0))
+
+/*
+** expand_u8_untied:
+** expand z0\.b, p0, z1\.b
+** ret
+*/
+TEST_UNIFORM_Z (expand_u8_untied, svuint8_t,
+ z0 = svexpand_u8 (p0, z1),
+ z0 = svexpand (p0, z1))
--
2.43.0
