Hi,
As reported in PR123870 we miscompile an RVV-optimized jpeg-quantsmooth
with xtheadvector. The core issue is that we forget to emit a vsetvl
before a -fschedule-insn induced spill restore. Spills are usually
handled by full-register loads and stores but xtheadvector doesn't have
those. Instead the regular loads and stores are used which differ from
full-register loads/store in the fact that they don't encode the LMUL
in the instruction directly and thus require a proper SEW and LMUL in
the vtype rather than just the ratio.
This patch re-uses vldr and vstr as "type" attribute and disables
the "ratio" attribute for them when TARGET_XTHEADVECTOR is
enabled.
I didn't manage to come up with a simple test case, though.
Regtested on rv64gcv_zvl512b.
Regards
Robin
PR target/123870
gcc/ChangeLog:
* config/riscv/thead-vector.md: Use vldr,vstr ad type for
pred_th_whole_mov.
* config/riscv/vector.md: Disable ratio for vldr,vstr with
TARGET_XTHEADVECTOR.
---
gcc/config/riscv/thead-vector.md | 2 +-
gcc/config/riscv/vector.md | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/riscv/thead-vector.md b/gcc/config/riscv/thead-vector.md
index 5a02debdd20..7aa908c3964 100644
--- a/gcc/config/riscv/thead-vector.md
+++ b/gcc/config/riscv/thead-vector.md
@@ -122,7 +122,7 @@ (define_insn_and_split "@pred_th_whole_mov<mode>"
&& REGNO (operands[0]) == REGNO (operands[1])"
[(const_int 0)]
""
- [(set_attr "type" "vimov,vlds,vlds")
+ [(set_attr "type" "vimov,vldr,vstr")
(set_attr "mode" "<MODE>")
(set (attr "ta") (symbol_ref "riscv_vector::TAIL_UNDISTURBED"))
(set (attr "ma") (symbol_ref "riscv_vector::MASK_UNDISTURBED"))
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index faa7f071881..c0a1a2cac91 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -503,8 +503,8 @@ (define_attr "ratio" ""
vaeskf1,vaeskf2,vaesz,vsha2ms,vsha2ch,vsha2cl,vsm4k,vsm4r,\
vsm3me,vsm3c,vfncvtbf16,vfwcvtbf16,vfwmaccbf16")
(const_int INVALID_ATTRIBUTE)
- (and (eq_attr "type" "vlde,vste,vlsegde,vssegte,vlsegds,vssegts,\
- vlsegdff,vssegtux,vlsegdox,vlsegdux")
+ (and (eq_attr "type" "vlde,vste,vldr,vstr,vlsegde,vssegte,vlsegds,\
+ vssegts,vlsegdff,vssegtux,vlsegdox,vlsegdux")
(match_test "TARGET_XTHEADVECTOR"))
(const_int INVALID_ATTRIBUTE)
(eq_attr "mode" "RVVM8QI,RVVM1BI") (const_int 1)
--
2.52.0