Hi,Thank you for your reply. Regarding the background of this patch, it was discovered during my study of the source code that there was a significant deficiency in the code logic.
About the test cases, the case where stm_case = 5 is not easily triggered, so currently there are no test cases. this patch was proposed based on the code logic and symmetry. And the issue of code formatting, I have resent the correct-format patch via git send-email. Please check it. > -----原始邮件----- > 发件人: "Richard Earnshaw (foss)" <[email protected]> > 发送时间:2026-02-02 19:35:06 (星期一) > 收件人: 覃珊珊 <[email protected]>, [email protected] > 抄送: [email protected], [email protected], [email protected], > [email protected] > 主题: Re: [PATCH]arm: Enable stm_case=5 in store_multiple_sequence > > On 02/02/2026 08:29, 覃珊珊 wrote: > > The load_multiple_sequence function already supports ldm_case=5 to handle > > memory references with arbitrary ARM-encodable constant offsets (via > > const_ok_for_arm). However, the corresponding store path in > > store_multiple_sequence lacked this capability, even though gen_stm_seq > > was prepared to handle stm_case=5. > > > > The change adds a check similar to load_multiple_sequence: when the > > offset is not zero but can be encoded as an ARM immediate (using > > const_ok_for_arm), we now return stm_case = 5. This enables the > > generation of add+stm sequences for store operations, improving > > code size and maintaining consistency between load and store > > optimizations. > > > > gcc/ChangeLog: > > * config/arm/arm.c (store_multiple_sequence): Add support for > > stm_case=5 using const_ok_for_arm to check offset encodability. > > > > Signed-off-by: tanshanshan <[email protected] > > <mailto:[email protected]>> > > --- > > gcc/config/arm/arm.cc | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc > > index 0a1f6612d07..5861849daae 100644 > > --- a/gcc/config/arm/arm.cc > > +++ b/gcc/config/arm/arm.cc > > @@ -14907,6 +14907,9 @@ store_multiple_sequence (rtx *operands, int nops, > > int nops_total, > > stm_case = 3; /* stmda */ > > else if (TARGET_32BIT && unsorted_offsets[order[nops - 1]] == -4) > > stm_case = 4; /* stmdb */ > > + else if (const_ok_for_arm (unsorted_offsets[order[0]]) > > + || const_ok_for_arm (-unsorted_offsets[order[0]])) > > + stm_case = 5; > > else > > return 0; > > > > -- > > 2.43.0 > > > > > > Hi, thanks for the patch. > > Can you provide some additional background please? Did you spot this just by > observation (reading the code), or because you have identified a case where > the code generated is failing/suboptimal without this change? Does it fix a > bug report (in our bugzilla)? If so, which? > > How have you tested it? We would normally want a test-case that demonstrates > a patch is doing the right thing? > > A small nit on the code formatting: > > > + else if (const_ok_for_arm (unsorted_offsets[order[0]]) > > + || const_ok_for_arm (-unsorted_offsets[order[0]])) > > The continuation line here should be indented to the depth of the opening > parenthesis, so > > else if (const_ok_for_arm (unsorted_offsets[order[0]]) > || const_ok_for_arm (-unsorted_offsets[order[0]])) > > Use hard tabs for multiples of 8 spaces. > > Thanks one again, > R.
