Yet more testing showed that compare insns too, were prone to catching
double-memory operands, for example with
c-c++-common/vector-compare-3.c -O2, from gcc.dg. So, better try to
fix them, helping current and future optimization passes that are
reluctant or unable to operate on patterns with two memory operands.
This just happens at expansion time by hacking the force_reg stuff to
conveniently happen in the operand-massaging function
cris_reduce_compare. Together, this and the two previous CRIS patches
did improve coremark results, but by a miniscule factor: speed by
0.002% (from 4887074 to 4886993 cycles) and size by 0.1% (code from
58199 to 58143 bytes) and as you can see, with rounding doing heavy
lifting.
* config/cris/cris.cc (cris_reduce_compare): Add forcing the first
operand to be a register, unless the second operand is 0, to scope.
* config/cris/cris.md ("*cstore<mode><code>4")
("*cbranch<mode><code>4"): Add guards to condition, for either operand
to be a register unless the last operand is zero.
---
gcc/config/cris/cris.cc | 17 +++++++++++++----
gcc/config/cris/cris.md | 8 ++++++--
2 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/gcc/config/cris/cris.cc b/gcc/config/cris/cris.cc
index ff487a0fcdc1..2112ceb0e66b 100644
--- a/gcc/config/cris/cris.cc
+++ b/gcc/config/cris/cris.cc
@@ -2799,11 +2799,11 @@ cris_split_constant (HOST_WIDE_INT wval, enum rtx_code
code,
/* Try to change a comparison against a constant to be against zero, and
an unsigned compare against zero to be an equality test. Beware:
- only valid for compares of integer-type operands. Also, note that we
- don't use operand 0 at the moment. */
+ only valid for compares of integer-type operands. Also forces one operand
+ to be a register, unless either is 0. */
void
-cris_reduce_compare (rtx *relp, rtx *, rtx *op1p)
+cris_reduce_compare (rtx *relp, rtx *op0p, rtx *op1p)
{
rtx op1 = *op1p;
rtx_code code = GET_CODE (*relp);
@@ -2849,9 +2849,18 @@ cris_reduce_compare (rtx *relp, rtx *, rtx *op1p)
if (code != GET_CODE (*relp))
{
- *op1p = const0_rtx;
+ op1 = const0_rtx;
+ *op1p = op1;
PUT_CODE (*relp, code);
}
+
+ if (op1 != const0_rtx && *op0p != const0_rtx)
+ {
+ machine_mode op1mode = GET_MODE (op1);
+
+ *op0p = force_reg (op1mode != VOIDmode ? op1mode : GET_MODE (*op0p),
+ *op0p);
+ }
}
/* The expander for the prologue pattern name. */
diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index 5d41a6d0d840..76a6462e9180 100644
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -2349,7 +2349,9 @@ (define_insn_and_split "*cbranch<mode><code>4"
(label_ref (match_operand 2 ""))
(pc)))
(clobber (reg:CC CRIS_CC0_REGNUM))]
- ""
+ "(register_operand (operands[0], <MODE>mode)
+ || register_operand (operands[1], <MODE>mode)
+ || operands[1] == const0_rtx)"
"#"
"&& reload_completed"
[(set (reg:<xCC> CRIS_CC0_REGNUM)
@@ -2505,7 +2507,9 @@ (define_insn_and_split "*cstore<mode><code>4"
(match_operand:BWDD 1 "nonimmediate_operand" "<cmp_op0c>")
(match_operand:BWDD 2 "general_operand" "<cmp_op1c>")))
(clobber (reg:CC CRIS_CC0_REGNUM))]
- ""
+ "(register_operand (operands[1], <MODE>mode)
+ || register_operand (operands[2], <MODE>mode)
+ || operands[2] == const0_rtx)"
"#"
"&& reload_completed"
[(set (reg:<xCC> CRIS_CC0_REGNUM)
--
2.30.2
