The recently added patterns for recovering good code generation of
conditional operations on RISC-V with Zicond had a nasty little bug
causing this bootstrap failure.
The main patterns are fine -- in those cases the czero produces a
neutral value. So for example a conditional IOR can use a czero to
select between an IOR's operand and zero, then we do an unconditional
IOR of the common value and the result of the czero.
For AND the neutral value is -1 rather than 0. So we need a different
sequence. We emit the AND into a temporary. Then select between the
common term and zero. Then IOR the temporary with the selected value.
That sequence requires the tense of the selection to be inverted which I
failed to do in the split RTL output of the pattern.
Those had been tested by inspection only and the tense flip was missed.
Doko's bootstrap test with zicond enabled by default was able to trip
this problem. Thankfully it was easy to reproduce and bisect and was
mostly a matter of waiting for builds to run.
I've bootstrapped this on one of my BPIs with B, V and Zicond enabled by
default. I'll be pushing it to the trunk momentarily. I never actually
compared assembly or debugged the resulting code, it was found purely by
inspection once I knew where to look. ie, I don't have a testcase for
the testsuite, but this is covered by bootstrapping with Zicond enabled.
I'd been somewhat worried about this possibility for a while -- the B, V
and Zicond extensions are not well represented by CI systems for
bootstrap testing. Given the Pioneer here is still limping along, it's
a good test of rv64gc and I've hacked things up so that the BPI will
enable B, V and Zicond by default.
The baseline run is still in progress (bootstrapping and regression
testing on the BPI is up to 30 hours now), but we'll have coverage going
forward. Obviously when the K3 systems come out the hope is this cycle
time will drop meaningfully.
Pushing to the trunk,
Jeff
PR target/124048
gcc/
* config/riscv/zicond.md (conditional AND patterns): Fix missed
flipping the condition's test in RTL output.
diff --git a/gcc/config/riscv/zicond.md b/gcc/config/riscv/zicond.md
index c22559eb8d6..2aefcff4fef 100644
--- a/gcc/config/riscv/zicond.md
+++ b/gcc/config/riscv/zicond.md
@@ -382,7 +382,7 @@
"#"
"&& 1"
[(set (match_dup 4) (and:X (match_dup 2) (match_dup 3)))
- (set (match_dup 5) (if_then_else:X (ne:X (match_dup 1) (const_int 0))
+ (set (match_dup 5) (if_then_else:X (eq:X (match_dup 1) (const_int 0))
(match_dup 2)
(const_int 0)))
(set (match_dup 0) (ior:X (match_dup 5) (match_dup 4)))]
@@ -406,7 +406,7 @@
"#"
"&& 1"
[(set (match_dup 4) (and:X (match_dup 2) (match_dup 3)))
- (set (match_dup 5) (if_then_else:X (ne:X (match_dup 1) (const_int 0))
+ (set (match_dup 5) (if_then_else:X (eq:X (match_dup 1) (const_int 0))
(match_dup 2)
(const_int 0)))
(set (match_dup 0) (ior:X (match_dup 5) (match_dup 4)))]
