Ok for trunk?
--
Since r16-5947-ga6c50ec2c6ebcb, gcc no longer uses a register for the
stack offset. Adjust the expected assembler to use sp directly instead.
r16-5946-g83739ee76da65d produces:
stacktest1:
sub sp, sp, #8
add r3, sp, #6
strh r0, [r3] @ __bf16
ldrh r0, [sp, #6] @ __bf16
add sp, sp, #8
bx lr
r16-5947-ga6c50ec2c6ebcb produces:
stacktest1:
sub sp, sp, #8
strh r0, [sp, #6] @ __bf16
ldrh r0, [sp, #6] @ __bf16
add sp, sp, #8
bx lr
gcc/testsuite/ChangeLog:
* gcc.target/arm/bfloat16_scalar_1_2.c: Adjust assembler to mach
compiler.
* gcc.target/arm/bfloat16_scalar_2_2.c: Likewise.
* gcc.target/arm/bfloat16_scalar_3_2.c: Likewise.
* gcc.target/arm/bfloat16_simd_1_2.c: Likewise.
* gcc.target/arm/bfloat16_simd_2_2.c: Likewise.
* gcc.target/arm/bfloat16_simd_3_2.c: Likewise.
---
gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c | 4 ++--
gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c | 4 ++--
gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c | 4 ++--
gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 4 ++--
gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 4 ++--
gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 4 ++--
6 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c
b/gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c
index 079814ef337..455f7debf79 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c
@@ -9,8 +9,8 @@
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c
b/gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c
index fc252b94edc..a7924731c19 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c
@@ -12,8 +12,8 @@
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c
b/gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c
index 079814ef337..455f7debf79 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c
@@ -9,8 +9,8 @@
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
index 299bd60086b..de2d979c094 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
@@ -11,8 +11,8 @@
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
index 9b1ff278041..04c881cd972 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
@@ -14,8 +14,8 @@
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
index ec9f4a0d690..0e4c504f179 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
@@ -11,8 +11,8 @@
/*
**stacktest1:
** ...
-** strh r[0-9]+, \[r[0-9]+\] @ __bf16
-** ldrh r[0-9]+, \[sp, #[0-9]+\] @ __bf16
+** strh r[0-9]+, (\[sp, #[0-9]+\]) @ __bf16
+** ldrh r[0-9]+, \1 @ __bf16
** ...
** bx lr
*/
--
2.43.0
