This patch incorporates changes to this file in Binutils
since October 2025. This file includes the new system
registers in the 2025 architecture extensions.
Regression tested on aarch64-none-elf and aarch64-linux-gnu
and found no regressions.
Ok for master?
Regards,
Srinath
gcc/ChangeLog:
* config/aarch64/aarch64-sys-regs.def: Copy from Binutils.
---
gcc/config/aarch64/aarch64-sys-regs.def | 379 ++++++++++++++++++++++++
1 file changed, 379 insertions(+)
diff --git a/gcc/config/aarch64/aarch64-sys-regs.def
b/gcc/config/aarch64/aarch64-sys-regs.def
index 36db395878d..9daa178ed7b 100644
--- a/gcc/config/aarch64/aarch64-sys-regs.def
+++ b/gcc/config/aarch64/aarch64-sys-regs.def
@@ -45,6 +45,118 @@
SYSREG ("actlrmask_el1", CPENC (3,0,1,4,1), 0,
AARCH64_FEATURE (V9_5A)) /* SRMASK */
SYSREG ("actlrmask_el12", CPENC (3,5,1,4,1), 0,
AARCH64_FEATURE (V9_5A)) /* SRMASK */
SYSREG ("actlrmask_el2", CPENC (3,4,1,4,1), 0,
AARCH64_FEATURE (V9_5A)) /* SRMASK */
+ SYSREG ("afgdtp0_el1", CPENC (3,0,3,6,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp0_el12", CPENC (3,5,3,6,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp0_el2", CPENC (3,4,3,6,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp0_el3", CPENC (3,6,3,6,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp10_el1", CPENC (3,0,3,7,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp10_el12", CPENC (3,5,3,7,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp10_el2", CPENC (3,4,3,7,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp10_el3", CPENC (3,6,3,7,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp11_el1", CPENC (3,0,3,7,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp11_el12", CPENC (3,5,3,7,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp11_el2", CPENC (3,4,3,7,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp11_el3", CPENC (3,6,3,7,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp12_el1", CPENC (3,0,3,7,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp12_el12", CPENC (3,5,3,7,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp12_el2", CPENC (3,4,3,7,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp12_el3", CPENC (3,6,3,7,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp13_el1", CPENC (3,0,3,7,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp13_el12", CPENC (3,5,3,7,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp13_el2", CPENC (3,4,3,7,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp13_el3", CPENC (3,6,3,7,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp14_el1", CPENC (3,0,3,7,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp14_el12", CPENC (3,5,3,7,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp14_el2", CPENC (3,4,3,7,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp14_el3", CPENC (3,6,3,7,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp15_el1", CPENC (3,0,3,7,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp15_el12", CPENC (3,5,3,7,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp15_el2", CPENC (3,4,3,7,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp15_el3", CPENC (3,6,3,7,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp1_el1", CPENC (3,0,3,6,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp1_el12", CPENC (3,5,3,6,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp1_el2", CPENC (3,4,3,6,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp1_el3", CPENC (3,6,3,6,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp2_el1", CPENC (3,0,3,6,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp2_el12", CPENC (3,5,3,6,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp2_el2", CPENC (3,4,3,6,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp2_el3", CPENC (3,6,3,6,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp3_el1", CPENC (3,0,3,6,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp3_el12", CPENC (3,5,3,6,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp3_el2", CPENC (3,4,3,6,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp3_el3", CPENC (3,6,3,6,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp4_el1", CPENC (3,0,3,6,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp4_el12", CPENC (3,5,3,6,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp4_el2", CPENC (3,4,3,6,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp4_el3", CPENC (3,6,3,6,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp5_el1", CPENC (3,0,3,6,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp5_el12", CPENC (3,5,3,6,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp5_el2", CPENC (3,4,3,6,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp5_el3", CPENC (3,6,3,6,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp6_el1", CPENC (3,0,3,6,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp6_el12", CPENC (3,5,3,6,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp6_el2", CPENC (3,4,3,6,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp6_el3", CPENC (3,6,3,6,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp7_el1", CPENC (3,0,3,6,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp7_el12", CPENC (3,5,3,6,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp7_el2", CPENC (3,4,3,6,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp7_el3", CPENC (3,6,3,6,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp8_el1", CPENC (3,0,3,7,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp8_el12", CPENC (3,5,3,7,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp8_el2", CPENC (3,4,3,7,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp8_el3", CPENC (3,6,3,7,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp9_el1", CPENC (3,0,3,7,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp9_el12", CPENC (3,5,3,7,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp9_el2", CPENC (3,4,3,7,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtp9_el3", CPENC (3,6,3,7,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu0_el1", CPENC (3,0,3,8,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu0_el12", CPENC (3,5,3,8,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu0_el2", CPENC (3,4,3,8,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu10_el1", CPENC (3,0,3,9,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu10_el12", CPENC (3,5,3,9,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu10_el2", CPENC (3,4,3,9,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu11_el1", CPENC (3,0,3,9,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu11_el12", CPENC (3,5,3,9,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu11_el2", CPENC (3,4,3,9,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu12_el1", CPENC (3,0,3,9,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu12_el12", CPENC (3,5,3,9,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu12_el2", CPENC (3,4,3,9,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu13_el1", CPENC (3,0,3,9,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu13_el12", CPENC (3,5,3,9,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu13_el2", CPENC (3,4,3,9,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu14_el1", CPENC (3,0,3,9,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu14_el12", CPENC (3,5,3,9,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu14_el2", CPENC (3,4,3,9,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu15_el1", CPENC (3,0,3,9,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu15_el12", CPENC (3,5,3,9,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu15_el2", CPENC (3,4,3,9,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu1_el1", CPENC (3,0,3,8,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu1_el12", CPENC (3,5,3,8,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu1_el2", CPENC (3,4,3,8,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu2_el1", CPENC (3,0,3,8,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu2_el12", CPENC (3,5,3,8,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu2_el2", CPENC (3,4,3,8,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu3_el1", CPENC (3,0,3,8,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu3_el12", CPENC (3,5,3,8,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu3_el2", CPENC (3,4,3,8,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu4_el1", CPENC (3,0,3,8,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu4_el12", CPENC (3,5,3,8,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu4_el2", CPENC (3,4,3,8,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu5_el1", CPENC (3,0,3,8,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu5_el12", CPENC (3,5,3,8,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu5_el2", CPENC (3,4,3,8,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu6_el1", CPENC (3,0,3,8,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu6_el12", CPENC (3,5,3,8,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu6_el2", CPENC (3,4,3,8,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu7_el1", CPENC (3,0,3,8,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu7_el12", CPENC (3,5,3,8,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu7_el2", CPENC (3,4,3,8,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu8_el1", CPENC (3,0,3,9,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu8_el12", CPENC (3,5,3,9,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu8_el2", CPENC (3,4,3,9,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu9_el1", CPENC (3,0,3,9,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu9_el12", CPENC (3,5,3,9,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("afgdtu9_el2", CPENC (3,4,3,9,1), 0,
AARCH64_FEATURE (POE2))
SYSREG ("afsr0_el1", CPENC (3,0,5,1,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("afsr0_el12", CPENC (3,5,5,1,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("afsr0_el2", CPENC (3,4,5,1,0), 0,
AARCH64_NO_FEATURES)
@@ -391,6 +503,14 @@
SYSREG ("disr_el1", CPENC (3,0,12,1,1), 0,
AARCH64_FEATURE (RAS))
SYSREG ("dit", CPENC (3,3,4,2,5), 0,
AARCH64_FEATURE (V8_3A)) /* DIT */
SYSREG ("dlr_el0", CPENC (3,3,4,5,1), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("dpocr_el0", CPENC (3,3,4,5,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("dpotbr0_el1", CPENC (3,0,2,0,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("dpotbr0_el12", CPENC (3,5,2,0,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("dpotbr0_el2", CPENC (3,4,2,0,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("dpotbr0_el3", CPENC (3,6,2,0,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("dpotbr1_el1", CPENC (3,0,2,0,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("dpotbr1_el12", CPENC (3,5,2,0,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("dpotbr1_el2", CPENC (3,4,2,0,7), 0,
AARCH64_FEATURE (POE2))
SYSREG ("dspsr_el0", CPENC (3,3,4,5,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("elr_el1", CPENC (3,0,4,0,1), 0,
AARCH64_NO_FEATURES)
SYSREG ("elr_el12", CPENC (3,5,4,0,1), 0,
AARCH64_NO_FEATURES)
@@ -418,6 +538,118 @@
SYSREG ("far_el12", CPENC (3,5,6,0,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("far_el2", CPENC (3,4,6,0,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("far_el3", CPENC (3,6,6,0,0), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("fgdtp0_el1", CPENC (3,0,3,2,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp0_el12", CPENC (3,5,3,2,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp0_el2", CPENC (3,4,3,2,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp0_el3", CPENC (3,6,3,2,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp10_el1", CPENC (3,0,3,3,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp10_el12", CPENC (3,5,3,3,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp10_el2", CPENC (3,4,3,3,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp10_el3", CPENC (3,6,3,3,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp11_el1", CPENC (3,0,3,3,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp11_el12", CPENC (3,5,3,3,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp11_el2", CPENC (3,4,3,3,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp11_el3", CPENC (3,6,3,3,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp12_el1", CPENC (3,0,3,3,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp12_el12", CPENC (3,5,3,3,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp12_el2", CPENC (3,4,3,3,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp12_el3", CPENC (3,6,3,3,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp13_el1", CPENC (3,0,3,3,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp13_el12", CPENC (3,5,3,3,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp13_el2", CPENC (3,4,3,3,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp13_el3", CPENC (3,6,3,3,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp14_el1", CPENC (3,0,3,3,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp14_el12", CPENC (3,5,3,3,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp14_el2", CPENC (3,4,3,3,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp14_el3", CPENC (3,6,3,3,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp15_el1", CPENC (3,0,3,3,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp15_el12", CPENC (3,5,3,3,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp15_el2", CPENC (3,4,3,3,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp15_el3", CPENC (3,6,3,3,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp1_el1", CPENC (3,0,3,2,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp1_el12", CPENC (3,5,3,2,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp1_el2", CPENC (3,4,3,2,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp1_el3", CPENC (3,6,3,2,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp2_el1", CPENC (3,0,3,2,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp2_el12", CPENC (3,5,3,2,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp2_el2", CPENC (3,4,3,2,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp2_el3", CPENC (3,6,3,2,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp3_el1", CPENC (3,0,3,2,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp3_el12", CPENC (3,5,3,2,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp3_el2", CPENC (3,4,3,2,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp3_el3", CPENC (3,6,3,2,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp4_el1", CPENC (3,0,3,2,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp4_el12", CPENC (3,5,3,2,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp4_el2", CPENC (3,4,3,2,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp4_el3", CPENC (3,6,3,2,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp5_el1", CPENC (3,0,3,2,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp5_el12", CPENC (3,5,3,2,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp5_el2", CPENC (3,4,3,2,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp5_el3", CPENC (3,6,3,2,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp6_el1", CPENC (3,0,3,2,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp6_el12", CPENC (3,5,3,2,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp6_el2", CPENC (3,4,3,2,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp6_el3", CPENC (3,6,3,2,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp7_el1", CPENC (3,0,3,2,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp7_el12", CPENC (3,5,3,2,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp7_el2", CPENC (3,4,3,2,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp7_el3", CPENC (3,6,3,2,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp8_el1", CPENC (3,0,3,3,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp8_el12", CPENC (3,5,3,3,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp8_el2", CPENC (3,4,3,3,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp8_el3", CPENC (3,6,3,3,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp9_el1", CPENC (3,0,3,3,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp9_el12", CPENC (3,5,3,3,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp9_el2", CPENC (3,4,3,3,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtp9_el3", CPENC (3,6,3,3,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu0_el1", CPENC (3,0,3,4,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu0_el12", CPENC (3,5,3,4,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu0_el2", CPENC (3,4,3,4,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu10_el1", CPENC (3,0,3,5,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu10_el12", CPENC (3,5,3,5,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu10_el2", CPENC (3,4,3,5,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu11_el1", CPENC (3,0,3,5,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu11_el12", CPENC (3,5,3,5,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu11_el2", CPENC (3,4,3,5,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu12_el1", CPENC (3,0,3,5,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu12_el12", CPENC (3,5,3,5,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu12_el2", CPENC (3,4,3,5,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu13_el1", CPENC (3,0,3,5,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu13_el12", CPENC (3,5,3,5,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu13_el2", CPENC (3,4,3,5,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu14_el1", CPENC (3,0,3,5,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu14_el12", CPENC (3,5,3,5,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu14_el2", CPENC (3,4,3,5,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu15_el1", CPENC (3,0,3,5,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu15_el12", CPENC (3,5,3,5,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu15_el2", CPENC (3,4,3,5,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu1_el1", CPENC (3,0,3,4,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu1_el12", CPENC (3,5,3,4,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu1_el2", CPENC (3,4,3,4,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu2_el1", CPENC (3,0,3,4,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu2_el12", CPENC (3,5,3,4,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu2_el2", CPENC (3,4,3,4,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu3_el1", CPENC (3,0,3,4,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu3_el12", CPENC (3,5,3,4,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu3_el2", CPENC (3,4,3,4,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu4_el1", CPENC (3,0,3,4,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu4_el12", CPENC (3,5,3,4,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu4_el2", CPENC (3,4,3,4,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu5_el1", CPENC (3,0,3,4,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu5_el12", CPENC (3,5,3,4,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu5_el2", CPENC (3,4,3,4,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu6_el1", CPENC (3,0,3,4,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu6_el12", CPENC (3,5,3,4,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu6_el2", CPENC (3,4,3,4,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu7_el1", CPENC (3,0,3,4,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu7_el12", CPENC (3,5,3,4,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu7_el2", CPENC (3,4,3,4,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu8_el1", CPENC (3,0,3,5,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu8_el12", CPENC (3,5,3,5,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu8_el2", CPENC (3,4,3,5,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu9_el1", CPENC (3,0,3,5,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu9_el12", CPENC (3,5,3,5,1), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("fgdtu9_el2", CPENC (3,4,3,5,1), 0,
AARCH64_FEATURE (POE2))
SYSREG ("fgwte3_el3", CPENC (3,6,1,1,5), 0,
AARCH64_FEATURE (V9_4A)) /* FGWTE3 */
SYSREG ("fpcr", CPENC (3,3,4,4,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("fpexc32_el2", CPENC (3,4,5,3,0), 0,
AARCH64_NO_FEATURES)
@@ -444,6 +676,8 @@
SYSREG ("hafgrtr_el2", CPENC (3,4,3,1,6), 0,
AARCH64_FEATURE (V8_5A)) /* AMUv1 && FGT */
SYSREG ("hcr_el2", CPENC (3,4,1,1,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("hcrx_el2", CPENC (3,4,1,2,2), 0,
AARCH64_FEATURE (V8_6A)) /* HCX */
+ SYSREG ("hcrmask_el2", CPENC (3,4,1,5,6), 0,
AARCH64_FEATURE (V9_6A)) /* SRMASK2 */
+ SYSREG ("hcrxmask_el2", CPENC (3,4,1,5,7), 0,
AARCH64_FEATURE (V9_6A)) /* SRMASK2 */
SYSREG ("hdbssbr_el2", CPENC (3,4,2,3,2), 0,
AARCH64_FEATURE (V9_4A)) /* HDBSS */
SYSREG ("hdbssprod_el2", CPENC (3,4,2,3,3), 0,
AARCH64_FEATURE (V9_4A)) /* HDBSS */
SYSREG ("hdfgrtr_el2", CPENC (3,4,3,1,4), 0,
AARCH64_FEATURE (V8_5A)) /* FGT */
@@ -458,6 +692,8 @@
SYSREG ("hfgwtr2_el2", CPENC (3,4,3,1,3), 0,
AARCH64_FEATURE (V8_8A)) /* FGT2 */
SYSREG ("hpfar_el2", CPENC (3,4,6,0,4), 0,
AARCH64_NO_FEATURES)
SYSREG ("hstr_el2", CPENC (3,4,1,1,3), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("icc_apr_el1", CPENC (3,1,12,0,0), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_apr_el3", CPENC (3,6,12,8,0), 0,
AARCH64_FEATURE (GCIE))
SYSREG ("icc_ap0r0_el1", CPENC (3,0,12,8,4), 0,
AARCH64_NO_FEATURES)
SYSREG ("icc_ap0r1_el1", CPENC (3,0,12,8,5), 0,
AARCH64_NO_FEATURES)
SYSREG ("icc_ap0r2_el1", CPENC (3,0,12,8,6), 0,
AARCH64_NO_FEATURES)
@@ -469,20 +705,63 @@
SYSREG ("icc_asgi1r_el1", CPENC (3,0,12,11,6), F_REG_WRITE,
AARCH64_NO_FEATURES)
SYSREG ("icc_bpr0_el1", CPENC (3,0,12,8,3), 0,
AARCH64_NO_FEATURES)
SYSREG ("icc_bpr1_el1", CPENC (3,0,12,12,3), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("icc_cr0_el1", CPENC (3,1,12,0,1), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_cr0_el3", CPENC (3,6,12,9,0), 0,
AARCH64_FEATURE (GCIE))
SYSREG ("icc_ctlr_el1", CPENC (3,0,12,12,4), 0,
AARCH64_NO_FEATURES)
SYSREG ("icc_ctlr_el3", CPENC (3,6,12,12,4), 0,
AARCH64_NO_FEATURES)
SYSREG ("icc_dir_el1", CPENC (3,0,12,11,1), F_REG_WRITE,
AARCH64_NO_FEATURES)
+ SYSREG ("icc_domhppir_el3", CPENC (3,6,12,8,2), F_REG_READ,
AARCH64_FEATURE (GCIE))
SYSREG ("icc_eoir0_el1", CPENC (3,0,12,8,1), F_REG_WRITE,
AARCH64_NO_FEATURES)
SYSREG ("icc_eoir1_el1", CPENC (3,0,12,12,1), F_REG_WRITE,
AARCH64_NO_FEATURES)
+ SYSREG ("icc_hapr_el1", CPENC (3,1,12,0,3), F_REG_READ,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_hppir_el1", CPENC (3,0,12,10,3), F_REG_READ,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_hppir_el3", CPENC (3,6,12,9,1), F_REG_READ,
AARCH64_FEATURE (GCIE))
SYSREG ("icc_hppir0_el1", CPENC (3,0,12,8,2), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("icc_hppir1_el1", CPENC (3,0,12,12,2), F_REG_READ,
AARCH64_NO_FEATURES)
+ SYSREG ("icc_iaffidr_el1", CPENC (3,0,12,10,5), F_REG_READ,
AARCH64_FEATURE (GCIE))
SYSREG ("icc_iar0_el1", CPENC (3,0,12,8,0), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("icc_iar1_el1", CPENC (3,0,12,12,0), F_REG_READ,
AARCH64_NO_FEATURES)
+ SYSREG ("icc_icsr_el1", CPENC (3,0,12,10,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_idr0_el1", CPENC (3,0,12,10,2), F_REG_READ,
AARCH64_FEATURE (GCIE))
SYSREG ("icc_igrpen0_el1", CPENC (3,0,12,12,6), 0,
AARCH64_NO_FEATURES)
SYSREG ("icc_igrpen1_el1", CPENC (3,0,12,12,7), 0,
AARCH64_NO_FEATURES)
SYSREG ("icc_igrpen1_el3", CPENC (3,6,12,12,7), 0,
AARCH64_NO_FEATURES)
SYSREG ("icc_nmiar1_el1", CPENC (3,0,12,9,5), F_REG_READ,
AARCH64_FEATURE (V8_7A)) /* GICv3_NMI */
+ SYSREG ("icc_pcr_el1", CPENC (3,1,12,0,2), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_pcr_el3", CPENC (3,6,12,8,1), 0,
AARCH64_FEATURE (GCIE))
SYSREG ("icc_pmr_el1", CPENC (3,0,4,6,0), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("icc_ppi_cactiver0_el1", CPENC (3,0,12,13,0), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_cactiver1_el1", CPENC (3,0,12,13,1), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_cpendr0_el1", CPENC (3,0,12,13,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_cpendr1_el1", CPENC (3,0,12,13,5), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_domainr0_el3", CPENC (3,6,12,8,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_domainr1_el3", CPENC (3,6,12,8,5), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_domainr2_el3", CPENC (3,6,12,8,6), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_domainr3_el3", CPENC (3,6,12,8,7), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_enabler0_el1", CPENC (3,0,12,10,6), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_enabler1_el1", CPENC (3,0,12,10,7), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_hmr0_el1", CPENC (3,0,12,10,0), F_REG_READ,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_hmr1_el1", CPENC (3,0,12,10,1), F_REG_READ,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr0_el1", CPENC (3,0,12,14,0), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr1_el1", CPENC (3,0,12,14,1), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr2_el1", CPENC (3,0,12,14,2), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr3_el1", CPENC (3,0,12,14,3), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr4_el1", CPENC (3,0,12,14,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr5_el1", CPENC (3,0,12,14,5), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr6_el1", CPENC (3,0,12,14,6), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr7_el1", CPENC (3,0,12,14,7), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr8_el1", CPENC (3,0,12,15,0), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr9_el1", CPENC (3,0,12,15,1), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr10_el1", CPENC (3,0,12,15,2), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr11_el1", CPENC (3,0,12,15,3), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr12_el1", CPENC (3,0,12,15,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr13_el1", CPENC (3,0,12,15,5), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr14_el1", CPENC (3,0,12,15,6), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_priorityr15_el1", CPENC (3,0,12,15,7), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_sactiver0_el1", CPENC (3,0,12,13,2), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_sactiver1_el1", CPENC (3,0,12,13,3), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_spendr0_el1", CPENC (3,0,12,13,6), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("icc_ppi_spendr1_el1", CPENC (3,0,12,13,7), 0,
AARCH64_FEATURE (GCIE))
SYSREG ("icc_rpr_el1", CPENC (3,0,12,11,3), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("icc_sgi0r_el1", CPENC (3,0,12,11,7), F_REG_WRITE,
AARCH64_NO_FEATURES)
SYSREG ("icc_sgi1r_el1", CPENC (3,0,12,11,5), F_REG_WRITE,
AARCH64_NO_FEATURES)
@@ -497,9 +776,15 @@
SYSREG ("ich_ap1r1_el2", CPENC (3,4,12,9,1), 0,
AARCH64_NO_FEATURES)
SYSREG ("ich_ap1r2_el2", CPENC (3,4,12,9,2), 0,
AARCH64_NO_FEATURES)
SYSREG ("ich_ap1r3_el2", CPENC (3,4,12,9,3), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("ich_apr_el2", CPENC (3,4,12,8,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_contextr_el2", CPENC (3,4,12,11,6), 0,
AARCH64_FEATURE (GCIE))
SYSREG ("ich_eisr_el2", CPENC (3,4,12,11,3), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("ich_elrsr_el2", CPENC (3,4,12,11,5), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("ich_hcr_el2", CPENC (3,4,12,11,0), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("ich_hfgitr_el2", CPENC (3,4,12,9,7), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_hfgrtr_el2", CPENC (3,4,12,9,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_hfgwtr_el2", CPENC (3,4,12,9,6), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_hppir_el2", CPENC (3,4,12,8,5), F_REG_READ,
AARCH64_FEATURE (GCIE))
SYSREG ("ich_lr0_el2", CPENC (3,4,12,12,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("ich_lr10_el2", CPENC (3,4,12,13,2), 0,
AARCH64_NO_FEATURES)
SYSREG ("ich_lr11_el2", CPENC (3,4,12,13,3), 0,
AARCH64_NO_FEATURES)
@@ -517,6 +802,31 @@
SYSREG ("ich_lr8_el2", CPENC (3,4,12,13,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("ich_lr9_el2", CPENC (3,4,12,13,1), 0,
AARCH64_NO_FEATURES)
SYSREG ("ich_misr_el2", CPENC (3,4,12,11,2), F_REG_READ,
AARCH64_NO_FEATURES)
+ SYSREG ("ich_ppi_activer0_el2", CPENC (3,4,12,10,6), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_activer1_el2", CPENC (3,4,12,10,7), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_dvir0_el2", CPENC (3,4,12,10,0), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_dvir1_el2", CPENC (3,4,12,10,1), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_enabler0_el2", CPENC (3,4,12,10,2), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_enabler1_el2", CPENC (3,4,12,10,3), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_pendr0_el2", CPENC (3,4,12,10,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_pendr1_el2", CPENC (3,4,12,10,5), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr0_el2", CPENC (3,4,12,14,0), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr1_el2", CPENC (3,4,12,14,1), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr2_el2", CPENC (3,4,12,14,2), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr3_el2", CPENC (3,4,12,14,3), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr4_el2", CPENC (3,4,12,14,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr5_el2", CPENC (3,4,12,14,5), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr6_el2", CPENC (3,4,12,14,6), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr7_el2", CPENC (3,4,12,14,7), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr8_el2", CPENC (3,4,12,15,0), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr9_el2", CPENC (3,4,12,15,1), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr10_el2", CPENC (3,4,12,15,2), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr11_el2", CPENC (3,4,12,15,3), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr12_el2", CPENC (3,4,12,15,4), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr13_el2", CPENC (3,4,12,15,5), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr14_el2", CPENC (3,4,12,15,6), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_ppi_priorityr15_el2", CPENC (3,4,12,15,7), 0,
AARCH64_FEATURE (GCIE))
+ SYSREG ("ich_vctlr_el2", CPENC (3,4,12,11,4), 0,
AARCH64_FEATURE (GCIE))
SYSREG ("ich_vmcr_el2", CPENC (3,4,12,11,7), 0,
AARCH64_NO_FEATURES)
SYSREG ("ich_vtr_el2", CPENC (3,4,12,11,1), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("id_aa64afr0_el1", CPENC (3,0,0,5,4), F_REG_READ,
AARCH64_NO_FEATURES)
@@ -559,7 +869,17 @@
SYSREG ("id_pfr1_el1", CPENC (3,0,0,1,1), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("id_pfr2_el1", CPENC (3,0,0,3,4), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("ifsr32_el2", CPENC (3,4,5,0,1), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("irtbrp_el1", CPENC (3,0,2,0,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("irtbrp_el12", CPENC (3,5,2,0,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("irtbrp_el2", CPENC (3,4,2,0,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("irtbrp_el3", CPENC (3,6,2,0,5), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("irtbru_el1", CPENC (3,0,2,0,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("irtbru_el12", CPENC (3,5,2,0,4), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("irtbru_el2", CPENC (3,4,2,0,4), 0,
AARCH64_FEATURE (POE2))
SYSREG ("isr_el1", CPENC (3,0,12,1,0), F_REG_READ,
AARCH64_NO_FEATURES)
+ SYSREG ("ldstt_el1", CPENC (3,0,2,1,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("ldstt_el12", CPENC (3,5,2,1,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("ldstt_el2", CPENC (3,4,2,1,7), 0,
AARCH64_FEATURE (POE2))
SYSREG ("lorc_el1", CPENC (3,0,10,4,3), 0,
AARCH64_FEATURE (LOR))
SYSREG ("lorea_el1", CPENC (3,0,10,4,1), 0,
AARCH64_FEATURE (LOR))
SYSREG ("lorid_el1", CPENC (3,0,10,4,7), F_REG_READ,
AARCH64_FEATURE (LOR))
@@ -602,9 +922,16 @@
SYSREG ("mpambwcap_el2", CPENC (3,4,10,5,6), 0,
AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
SYSREG ("mpambwidr_el1", CPENC (3,0,10,4,5), F_REG_READ,
AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
SYSREG ("mpambwsm_el1", CPENC (3,0,10,5,7), 0,
AARCH64_FEATURES (2, SME, V9_3A)) /* SME && MPAM_PE_BW_CTRL */
+ SYSREG ("mpamctl_el1", CPENC (3,0,10,5,2), 0,
AARCH64_FEATURE (MPAMv2))
+ SYSREG ("mpamctl_el12", CPENC (3,5,10,5,2), 0,
AARCH64_FEATURE (MPAMv2))
+ SYSREG ("mpamctl_el2", CPENC (3,4,10,5,2), 0,
AARCH64_FEATURE (MPAMv2))
+ SYSREG ("mpamctl_el3", CPENC (3,6,10,5,2), 0,
AARCH64_FEATURE (MPAMv2))
SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0,
AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ,
AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), 0,
AARCH64_FEATURES (2, SME, V8_2A)) /* SME && MPAM */
+ SYSREG ("mpamvidcr_el2", CPENC (3,4,10,7,0), 0,
AARCH64_FEATURE (MPAMv2))
+ SYSREG ("mpamvidsr_el2", CPENC (3,4,10,7,1), 0,
AARCH64_FEATURE (MPAMv2))
+ SYSREG ("mpamvidsr_el3", CPENC (3,6,10,7,1), 0,
AARCH64_FEATURE (MPAMv2))
SYSREG ("mpamvpm0_el2", CPENC (3,4,10,6,0), 0,
AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamvpm1_el2", CPENC (3,4,10,6,1), 0,
AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamvpm2_el2", CPENC (3,4,10,6,2), 0,
AARCH64_FEATURE (V8_2A)) /* MPAM */
@@ -620,6 +947,10 @@
SYSREG ("mvfr0_el1", CPENC (3,0,0,3,0), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("mvfr1_el1", CPENC (3,0,0,3,1), F_REG_READ,
AARCH64_NO_FEATURES)
SYSREG ("mvfr2_el1", CPENC (3,0,0,3,2), F_REG_READ,
AARCH64_NO_FEATURES)
+ SYSREG ("nvhcr_el2", CPENC (3,4,1,5,0), 0,
AARCH64_FEATURE (V9_3A)) /* NV3 */
+ SYSREG ("nvhcrx_el2", CPENC (3,4,1,5,1), 0,
AARCH64_FEATURE (V9_6A)) /* NV3 && SRMASK2 */
+ SYSREG ("nvhcrmask_el2", CPENC (3,4,1,5,4), 0,
AARCH64_FEATURE (V9_6A)) /* NV3 && SRMASK2 */
+ SYSREG ("nvhcrxmask_el2", CPENC (3,4,1,5,5), 0,
AARCH64_FEATURE (V9_6A)) /* NV3 && SRMASK2 */
SYSREG ("nzcv", CPENC (3,3,4,2,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("osdlr_el1", CPENC (2,0,1,3,4), 0,
AARCH64_NO_FEATURES)
SYSREG ("osdtrrx_el1", CPENC (2,0,0,0,2), 0,
AARCH64_NO_FEATURES)
@@ -866,6 +1197,7 @@
SYSREG ("s2pir_el2", CPENC (3,4,10,2,5), 0,
AARCH64_FEATURE (V8_8A)) /* S2PIE */
SYSREG ("s2por_el1", CPENC (3,0,10,2,5), 0,
AARCH64_FEATURE (V8_8A)) /* S2POE */
SYSREG ("scr_el3", CPENC (3,6,1,1,0), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("scr2_el3", CPENC (3,6,1,2,2), 0,
AARCH64_FEATURE (V9_3A)) /* SCR2 */
SYSREG ("sctlr_el1", CPENC (3,0,1,0,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("sctlr_el12", CPENC (3,5,1,0,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("sctlr_el2", CPENC (3,4,1,0,0), 0,
AARCH64_NO_FEATURES)
@@ -996,6 +1328,10 @@
SYSREG ("spsr_svc", CPENC (3,0,4,0,0), F_DEPRECATED,
AARCH64_NO_FEATURES)
SYSREG ("spsr_und", CPENC (3,4,4,3,2), 0,
AARCH64_NO_FEATURES)
SYSREG ("ssbs", CPENC (3,3,4,2,6), 0,
AARCH64_FEATURE (SSBS))
+ SYSREG ("stindex_el1", CPENC (3,0,4,0,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("stindex_el12", CPENC (3,5,4,0,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("stindex_el2", CPENC (3,4,4,0,2), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("stindex_el3", CPENC (3,6,4,0,2), 0,
AARCH64_FEATURE (POE2))
SYSREG ("svcr", CPENC (3,3,4,2,2), 0,
AARCH64_FEATURE (SME))
SYSREG ("tco", CPENC (3,3,4,2,7), 0,
AARCH64_FEATURE (MEMTAG))
SYSREG ("tcr_el1", CPENC (3,0,2,0,2), 0,
AARCH64_NO_FEATURES)
@@ -1018,12 +1354,39 @@
SYSREG ("tfsr_el2", CPENC (3,4,5,6,0), 0,
AARCH64_FEATURE (MEMTAG))
SYSREG ("tfsr_el3", CPENC (3,6,5,6,0), 0,
AARCH64_FEATURE (MEMTAG))
SYSREG ("tfsre0_el1", CPENC (3,0,5,6,1), 0,
AARCH64_FEATURE (MEMTAG))
+ SYSREG ("tindex_el0", CPENC (3,3,4,0,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tindex_el1", CPENC (3,0,4,0,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tindex_el12", CPENC (3,5,4,0,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tindex_el2", CPENC (3,4,4,0,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tindex_el3", CPENC (3,6,4,0,3), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tlbididr_el1", CPENC (3,0,10,4,6), F_REG_READ,
AARCH64_FEATURE (TLBID))
SYSREG ("tpidr2_el0", CPENC (3,3,13,0,5), 0,
AARCH64_FEATURE (SME))
+ SYSREG ("tpidr3_el0", CPENC (3,3,13,0,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tpidr3_el1", CPENC (3,0,13,0,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tpidr3_el12", CPENC (3,5,13,0,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tpidr3_el2", CPENC (3,4,13,0,0), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tpidr3_el3", CPENC (3,6,13,0,0), 0,
AARCH64_FEATURE (POE2))
SYSREG ("tpidr_el0", CPENC (3,3,13,0,2), 0,
AARCH64_NO_FEATURES)
SYSREG ("tpidr_el1", CPENC (3,0,13,0,4), 0,
AARCH64_NO_FEATURES)
SYSREG ("tpidr_el2", CPENC (3,4,13,0,2), 0,
AARCH64_NO_FEATURES)
SYSREG ("tpidr_el3", CPENC (3,6,13,0,2), 0,
AARCH64_NO_FEATURES)
SYSREG ("tpidrro_el0", CPENC (3,3,13,0,3), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmax0_el0", CPENC (3,3,2,2,5), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmax0_el1", CPENC (3,0,2,2,5), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmax0_el12", CPENC (3,5,2,2,5), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmax0_el2", CPENC (3,4,2,2,5), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmax1_el0", CPENC (3,3,2,2,7), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmax1_el1", CPENC (3,0,2,2,7), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmax1_el12", CPENC (3,5,2,2,7), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmax1_el2", CPENC (3,4,2,2,7), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmin0_el0", CPENC (3,3,2,2,4), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmin0_el1", CPENC (3,0,2,2,4), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmin0_el12", CPENC (3,5,2,2,4), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmin0_el2", CPENC (3,4,2,2,4), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmin1_el0", CPENC (3,3,2,2,6), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmin1_el1", CPENC (3,0,2,2,6), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmin1_el12", CPENC (3,5,2,2,6), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("tpmin1_el2", CPENC (3,4,2,2,6), 0,
AARCH64_NO_FEATURES)
SYSREG ("trbbaser_el1", CPENC (3,0,9,11,2), 0,
AARCH64_FEATURE (V9A)) /* TRBE */
SYSREG ("trbidr_el1", CPENC (3,0,9,11,7), F_REG_READ,
AARCH64_FEATURE (V9A)) /* TRBE */
SYSREG ("trblimitr_el1", CPENC (3,0,9,11,0), 0,
AARCH64_FEATURE (V9A)) /* TRBE */
@@ -1264,6 +1627,13 @@
SYSREG ("ttbr1_el1", CPENC (3,0,2,0,1), F_REG_128,
AARCH64_NO_FEATURES)
SYSREG ("ttbr1_el12", CPENC (3,5,2,0,1), F_REG_128,
AARCH64_NO_FEATURES)
SYSREG ("ttbr1_el2", CPENC (3,4,2,0,1), F_REG_128,
AARCH64_FEATURE (V8A))
+ SYSREG ("tttbrp_el1", CPENC (3,0,10,2,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tttbrp_el12", CPENC (3,5,10,2,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tttbrp_el2", CPENC (3,4,10,2,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tttbrp_el3", CPENC (3,6,10,2,7), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tttbru_el1", CPENC (3,0,10,2,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tttbru_el12", CPENC (3,5,10,2,6), 0,
AARCH64_FEATURE (POE2))
+ SYSREG ("tttbru_el2", CPENC (3,4,10,2,6), 0,
AARCH64_FEATURE (POE2))
SYSREG ("uao", CPENC (3,0,4,2,4), 0,
AARCH64_FEATURE (V8_1A)) /* UAO */
SYSREG ("vbar_el1", CPENC (3,0,12,0,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("vbar_el12", CPENC (3,5,12,0,0), 0,
AARCH64_NO_FEATURES)
@@ -1274,6 +1644,7 @@
SYSREG ("vmecid_a_el2", CPENC (3,4,10,9,1), 0,
AARCH64_FEATURE (V9_2A)) /* MEC */
SYSREG ("vmecid_p_el2", CPENC (3,4,10,9,0), 0,
AARCH64_FEATURE (V9_2A)) /* MEC */
SYSREG ("vmpidr_el2", CPENC (3,4,0,0,5), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("vnccr_el2", CPENC (3,4,2,2,1), 0,
AARCH64_FEATURE (POE2))
SYSREG ("vncr_el2", CPENC (3,4,2,2,0), 0,
AARCH64_FEATURE (V8_3A)) /* NV2 */
SYSREG ("vpidr_el2", CPENC (3,4,0,0,0), 0,
AARCH64_NO_FEATURES)
SYSREG ("vsctlr_el2", CPENC (3,4,2,0,0), 0,
AARCH64_FEATURE (V8R))
@@ -1282,6 +1653,14 @@
SYSREG ("vstcr_el2", CPENC (3,4,2,6,2), 0,
AARCH64_FEATURE (V8_3A)) /* SEL2 */
SYSREG ("vsttbr_el2", CPENC (3,4,2,6,0), 0,
AARCH64_FEATURES (2, V8A, V8_3A)) /* SEL2 */
SYSREG ("vtcr_el2", CPENC (3,4,2,1,2), 0,
AARCH64_NO_FEATURES)
+ SYSREG ("vtlbid0_el2", CPENC (3,4,2,8,0), 0,
AARCH64_FEATURE (TLBID))
+ SYSREG ("vtlbid1_el2", CPENC (3,4,2,8,1), 0,
AARCH64_FEATURE (TLBID))
+ SYSREG ("vtlbid2_el2", CPENC (3,4,2,8,2), 0,
AARCH64_FEATURE (TLBID))
+ SYSREG ("vtlbid3_el2", CPENC (3,4,2,8,3), 0,
AARCH64_FEATURE (TLBID))
+ SYSREG ("vtlbidos0_el2", CPENC (3,4,2,9,0), 0,
AARCH64_FEATURE (TLBID))
+ SYSREG ("vtlbidos1_el2", CPENC (3,4,2,9,1), 0,
AARCH64_FEATURE (TLBID))
+ SYSREG ("vtlbidos2_el2", CPENC (3,4,2,9,2), 0,
AARCH64_FEATURE (TLBID))
+ SYSREG ("vtlbidos3_el2", CPENC (3,4,2,9,3), 0,
AARCH64_FEATURE (TLBID))
SYSREG ("vttbr_el2", CPENC (3,4,2,1,0), F_REG_128,
AARCH64_FEATURE (V8A))
SYSREG ("zcr_el1", CPENC (3,0,1,2,0), 0,
AARCH64_FEATURE (SVE))
SYSREG ("zcr_el12", CPENC (3,5,1,2,0), 0,
AARCH64_FEATURE (SVE))
--
2.25.1
