Wilco Dijkstra <[email protected]> writes:
> Fix unwinding of vector math functions by using the current function ABI.
> This fixes unwinding of AdvSIMD vector functions and the reported regression
> but does not change behaviour of SVE for now.
>
> Passes regress, OK for commit?
>
> gcc:
> PR target/124266
> * config/aarch64/aarch64.cc (aarch64_emit_cfi_for_reg_p):
> Return correct clobbers based on current function ABI.
>
> gcc/testsuite:
> PR target/124266
> * gcc.target/aarch64/pr124266.c: New test.
Why do we need to emit .eh_frame CFI for register state that is not
preserved by the base PCS, and thus not preserved across exception
edges? When would the extra register state be required?
Richard
>
> ---
>
> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> index
> 6b4e9e2b7a36c2b8e19c1c0ed9f9da1cf29c2de6..7bfb309602d39a090dbc8621a38f389b62c7bd7f
> 100644
> --- a/gcc/config/aarch64/aarch64.cc
> +++ b/gcc/config/aarch64/aarch64.cc
> @@ -2764,8 +2764,14 @@ aarch64_compatible_vector_types_p (const_tree type1,
> const_tree type2)
> static bool
> aarch64_emit_cfi_for_reg_p (unsigned int regno)
> {
> - return (GP_REGNUM_P (regno)
> - || !default_function_abi.clobbers_full_reg_p (regno));
> + if (GP_REGNUM_P (regno))
> + return true;
> +
> + /* FIXME PR124266: This is incorrect for SVE vector functions. */
> + if (crtl->abi->id () == ARM_PCS_SVE)
> + return !default_function_abi.clobbers_full_reg_p (regno);
> +
> + return !crtl->abi->clobbers_full_reg_p (regno);
> }
>
> /* Return the mode we should use to save and restore register REGNO. */
> diff --git a/gcc/testsuite/gcc.target/aarch64/pr124266.c
> b/gcc/testsuite/gcc.target/aarch64/pr124266.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..3d369539f4b000d06f8c37bc97238eb47b87d412
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/pr124266.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target aarch64_variant_pcs } */
> +/* { dg-options "-O2" } */
> +
> +void f0(void);
> +
> +__attribute__ ((aarch64_vector_pcs))
> +void f1 (void)
> +{
> + f0();
> +}
> +
> +/* { dg-final { scan-assembler-times ".cfi_offset" 18 } } */
> +/* { dg-final { scan-assembler-times ".cfi_restore" 18 } } */
