GCC has not able to build with binutils 2.30 due to the requirement
of needing zmull support. This changes the documentation to tbe
first binutils release that supported zmull.
PR target/124409
gcc/ChangeLog:
* doc/install.texi: Increment the required binutils for
riscv to 2.40.
Signed-off-by: Andrew Pinski <[email protected]>
(cherry picked from commit bad66dc2073c3cab47b774cfde316530136f5895)
---
gcc/doc/install.texi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index dcb2f3b3500..756f1fbe228 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -4821,7 +4821,7 @@ This configuration is intended for embedded systems.
@heading riscv32-*-elf
The RISC-V RV32 instruction set.
This configuration is intended for embedded systems.
-This (and all other RISC-V) targets require the binutils 2.30 release.
+This (and all other RISC-V) targets require the binutils 2.40 release.
@html
<hr />
@@ -4829,7 +4829,7 @@ This (and all other RISC-V) targets require the binutils
2.30 release.
@anchor{riscv32-x-linux}
@heading riscv32-*-linux
The RISC-V RV32 instruction set running GNU/Linux.
-This (and all other RISC-V) targets require the binutils 2.30 release.
+This (and all other RISC-V) targets require the binutils 2.40 release.
@html
<hr />
@@ -4838,7 +4838,7 @@ This (and all other RISC-V) targets require the binutils
2.30 release.
@heading riscv64-*-elf
The RISC-V RV64 instruction set.
This configuration is intended for embedded systems.
-This (and all other RISC-V) targets require the binutils 2.30 release.
+This (and all other RISC-V) targets require the binutils 2.40 release.
@html
<hr />
@@ -4846,7 +4846,7 @@ This (and all other RISC-V) targets require the binutils
2.30 release.
@anchor{riscv64-x-linux}
@heading riscv64-*-linux
The RISC-V RV64 instruction set running GNU/Linux.
-This (and all other RISC-V) targets require the binutils 2.30 release.
+This (and all other RISC-V) targets require the binutils 2.40 release.
@html
<hr />
--
2.43.0
