On Mon, May 4, 2026 at 4:55 PM Takayuki 'January June' Suwa <[email protected]> wrote: > > The load/store instructions in the Xtensa ISA have an unsigned 8-bit > displacement immediate field that scales with the byte width of the > reference. That is, for a 1-byte reference, the displacement is between > 0 and 255, for 2-bytes between 0 and 510, and for 4-bytes between 0 and > 1020. > > However, xtensa_legitimize_address() has not been able to take advantage > of this fact until now, and has limited the maximum displacement to 255 > regardless of the reference byte width. > > This patch resolves the above limitation and slightly improves the effi- > ciency of large positive displacements during memory accesses wider than > 1-byte. > > /* example */ > int test(short a[]) { > return a[32767] + a[16511] + a[1]; > } > > ;; before (-O2) > .literal_position > .literal .LC0, 65534 > test: > entry sp, 32 > l32r a8, .LC0 > addmi a9, a2, 0x100 > add.n a8, a2, a8 > addmi a9, a9, 0x7f00 > l16si a8, a8, 0 ;; 32767 = 65534 / 2 > l16si a9, a9, 254 ;; 16551 = (32512 + 256 + 254) / 2 > l16si a2, a2, 2 > add.n a8, a8, a9 > add.n a2, a8, a2 > retw.n > > ;; after (-O2) > test: > entry sp, 32 > addmi a9, a2, 0x7f00 ;; CSEd > addmi a8, a9, 0x7f00 > l16si a8, a8, 510 ;; 32767 = (32512 + 32512 + 510) / 2 > l16si a9, a9, 510 ;; 16511 = (32512 + 510) / 2 > l16si a2, a2, 2 > add.n a8, a8, a9 > add.n a2, a8, a2 > retw.n > > gcc/ChangeLog: > > * config/xtensa/xtensa.cc (xtensa_legitimize_address): > Modify to extend the upper limit of the coverable offset if the > address displacement of the corresponding machine instruction is > greater than 255. > --- > gcc/config/xtensa/xtensa.cc | 79 ++++++++++++++++++++++++------------- > 1 file changed, 52 insertions(+), 27 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max
