> -----Original Message-----
> From: Alfie Richards <[email protected]>
> Sent: 04 November 2025 13:58
> To: [email protected]
> Cc: Richard Earnshaw <[email protected]>; Tamar Christina
> <[email protected]>; [email protected]; Alice Carlotti
> <[email protected]>; Alex Coplan <[email protected]>; Wilco
> Dijkstra <[email protected]>; [email protected]; Alfie
> Richards <[email protected]>
> Subject: [PATCH v1] aarch64: Add support for FEAT_SSVE_BitPerm
>
> Hi All,
>
> Requires my patch updating the AArch64 cli arch options
> (https://gcc.gnu.org/pipermail/gcc-patches/2025-November/699488.html).
>
> Reg tested on AArch64.
>
> Okay for master after prereq lands?
>
> Alfie
>
> -- >8 --
>
> Adds support for the FEAT_SSVE_BitPerm AArch64 extension.
>
> FEAT_SSVE_BitPerm makes the FEAT_SVE2_BitPerm instructions available in
> streaming mode.
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add
> __ARM_FEATURE_SSVE_BITPERM.
> * config/aarch64/aarch64-sve-builtins-sve2.def:
> Make sve-bitperm intrinsics streaming compatible.
> * config/aarch64/aarch64-sve2.md: Change gating of sve-bitperm
> instructions.
> * config/aarch64/aarch64.h (TARGET_SVE_BITPERM): New macro.
> (TARGET_SSVE_BITPERM): New macro.
> (TARGET_STREAMING_SSVE_BITPERM): New macro.
>
> gcc/testsuite/ChangeLog:
>
> * lib/target-supports.exp (exts): Add dg conditions for ssve-bitperm.
> * g++.target/aarch64/sve/aarch64-ssve.exp: Update test for ssve-
> bitperm.
> * gcc.target/aarch64/pragma_cpp_predefs_5.c: Update test.
> * gcc.target/aarch64/sve2/acle/asm/bdep_u16.c: Update for ssve-
> bitperm.
> * gcc.target/aarch64/sve2/acle/asm/bdep_u32.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bdep_u64.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bdep_u8.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bext_u16.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bext_u32.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bext_u64.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bext_u8.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bgrp_u16.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bgrp_u32.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bgrp_u64.c: Likewise.
> * gcc.target/aarch64/sve2/acle/asm/bgrp_u8.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bdep_u16.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bdep_u32.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bdep_u64.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bdep_u8.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bext_u16.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bext_u32.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bext_u64.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bext_u8.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bgrp_u16.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bgrp_u32.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bgrp_u64.c: Likewise.
> * gcc.target/aarch64/sme2/acle-asm/bgrp_u8.c: Likewise.
> ---
> gcc/config/aarch64/aarch64-c.cc | 2 +
> .../aarch64/aarch64-sve-builtins-sve2.def | 3 +-
> gcc/config/aarch64/aarch64-sve2.md | 2 +-
> gcc/config/aarch64/aarch64.h | 16 +++-
> .../g++.target/aarch64/sve/aarch64-ssve.exp | 8 +-
> .../gcc.target/aarch64/pragma_cpp_predefs_5.c | 11 +++
> .../aarch64/sme2/acle-asm/bdep_u16.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bdep_u32.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bdep_u64.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bdep_u8.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bext_u16.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bext_u32.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bext_u64.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bext_u8.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bgrp_u16.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bgrp_u32.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bgrp_u64.c | 74 +++++++++++++++++++
> .../aarch64/sme2/acle-asm/bgrp_u8.c | 74 +++++++++++++++++++
> .../aarch64/sve2/acle/asm/bdep_u16.c | 7 +-
> .../aarch64/sve2/acle/asm/bdep_u32.c | 7 +-
> .../aarch64/sve2/acle/asm/bdep_u64.c | 7 +-
> .../aarch64/sve2/acle/asm/bdep_u8.c | 7 +-
> .../aarch64/sve2/acle/asm/bext_u16.c | 7 +-
> .../aarch64/sve2/acle/asm/bext_u32.c | 7 +-
> .../aarch64/sve2/acle/asm/bext_u64.c | 7 +-
> .../aarch64/sve2/acle/asm/bext_u8.c | 7 +-
> .../aarch64/sve2/acle/asm/bgrp_u16.c | 7 +-
> .../aarch64/sve2/acle/asm/bgrp_u32.c | 7 +-
> .../aarch64/sve2/acle/asm/bgrp_u64.c | 7 +-
> .../aarch64/sve2/acle/asm/bgrp_u8.c | 7 +-
> gcc/testsuite/lib/target-supports.exp | 2 +-
> 31 files changed, 995 insertions(+), 21 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bdep_u16.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bdep_u32.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bdep_u64.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bdep_u8.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bext_u16.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bext_u32.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bext_u64.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bext_u8.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bgrp_u16.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bgrp_u32.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bgrp_u64.c
> create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-
> asm/bgrp_u8.c
>
> diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-
> c.cc
> index c3957c762ef..fd940bdf733 100644
> --- a/gcc/config/aarch64/aarch64-c.cc
> +++ b/gcc/config/aarch64/aarch64-c.cc
> @@ -295,6 +295,8 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)
> aarch64_def_or_undef (AARCH64_HAVE_ISA (SME2p1),
> "__ARM_FEATURE_SME2p1", pfile);
> aarch64_def_or_undef (TARGET_FAMINMAX,
> "__ARM_FEATURE_FAMINMAX", pfile);
> + aarch64_def_or_undef (TARGET_SSVE_BITPERM,
> "__ARM_FEATURE_SSVE_BITPERM",
> + pfile);
>
> // Function multi-versioning defines
> aarch64_def_or_undef (targetm.has_ifunc_p (),
> diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sve2.def
> b/gcc/config/aarch64/aarch64-sve-builtins-sve2.def
> index b622fe33458..6f1601e6f22 100644
> --- a/gcc/config/aarch64/aarch64-sve-builtins-sve2.def
> +++ b/gcc/config/aarch64/aarch64-sve-builtins-sve2.def
> @@ -202,8 +202,7 @@ DEF_SVE_FUNCTION (svpmullb_pair, binary_opt_n,
> d_unsigned, none)
> DEF_SVE_FUNCTION (svpmullt_pair, binary_opt_n, d_unsigned, none)
> #undef REQUIRED_EXTENSIONS
>
> -#define REQUIRED_EXTENSIONS nonstreaming_sve (AARCH64_FL_SVE2 \
> - | AARCH64_FL_SVE2_BITPERM)
> +#define REQUIRED_EXTENSIONS streaming_compatible (AARCH64_FL_SVE2
> | AARCH64_FL_SVE_BITPERM, AARCH64_FL_SSVE_BITPERM)
> DEF_SVE_FUNCTION (svbdep, binary_opt_n, all_unsigned, none)
> DEF_SVE_FUNCTION (svbext, binary_opt_n, all_unsigned, none)
> DEF_SVE_FUNCTION (svbgrp, binary_opt_n, all_unsigned, none)
> diff --git a/gcc/config/aarch64/aarch64-sve2.md
> b/gcc/config/aarch64/aarch64-sve2.md
> index 91091835182..7c86573d364 100644
> --- a/gcc/config/aarch64/aarch64-sve2.md
> +++ b/gcc/config/aarch64/aarch64-sve2.md
> @@ -4191,7 +4191,7 @@ (define_insn
> "@aarch64_sve_<sve_int_op><mode>"
> [(match_operand:SVE_FULL_I 1 "register_operand" "w")
> (match_operand:SVE_FULL_I 2 "register_operand" "w")]
> SVE2_INT_BITPERM))]
> - "TARGET_SVE2_BITPERM"
> + "TARGET_SVE_BITPERM"
> "<sve_int_op>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
> [(set_attr "sve_type" "sve_int_bit_perm")]
> )
> diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
> index 47d8fc09925..b15999b5b37 100644
> --- a/gcc/config/aarch64/aarch64.h
> +++ b/gcc/config/aarch64/aarch64.h
> @@ -295,11 +295,25 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE
> ATTRIBUTE_UNUSED
> && AARCH64_HAVE_ISA (SVE_AES) \
> && TARGET_NON_STREAMING)
>
> -/* SVE2 BITPERM instructions, enabled through +sve2-bitperm. */
> +/* SVE BITPERM instructions, enabled through +sve2-bitperm or
> + +ssve-bitperm. */
> +#define TARGET_SVE_BITPERM (AARCH64_HAVE_ISA (SVE_BITPERM))
I find this name to be very confusing (I'm aware the FEAT is FEAT_SVE_)
but It looks like TARGET_SVE2_BITPERM isn't used anywhere else but
the CPP defines.
So how about instead of defining the above..
> +
> +/* Non-streaming support for SVE BITPERM instructions, enabled through
> + +sve2-bitperm. */
> #define TARGET_SVE2_BITPERM (AARCH64_HAVE_ISA (SVE2) \
> && AARCH64_HAVE_ISA (SVE_BITPERM) \
> && TARGET_NON_STREAMING)
>
..drop TARGET_NON_STREAMING from here and change
aarch64_def_or_undef (TARGET_SVE2_BITPERM,
"__ARM_FEATURE_SVE2_BITPERM", pfile);
to
aarch64_def_or_undef (TARGET_SVE2_BITPERM && TARGET_NON_STREAMING,
"__ARM_FEATURE_SVE2_BITPERM", pfile);
So we avoid the really confusing macro name.
> +/* Streaming support for SVE BITPERM instructions, enabled through
> + +ssve-bitperm (which implies SVE2_BITPERM so that all relevant
> instructions
> + are streaming compatible). */
> +#define TARGET_SSVE_BITPERM (AARCH64_HAVE_ISA (SSVE_BITPERM))
> +
> +#define TARGET_STREAMING_SSVE_BITPERM (AARCH64_HAVE_ISA
> (SSVE_BITPERM) \
> + && TARGET_STREAMING)
> +
> +
> /* SVE2 SHA3 instructions, enabled through +sve2-sha3. */
> #define TARGET_SVE2_SHA3 (AARCH64_HAVE_ISA (SVE2) \
> && AARCH64_HAVE_ISA (SVE_SHA3) \
> diff --git a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp
> b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp
> index 6ba12bc6bbd..6e266330954 100644
> --- a/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp
> +++ b/gcc/testsuite/g++.target/aarch64/sve/aarch64-ssve.exp
> @@ -37,7 +37,7 @@ gcc_parallel_test_enable 0
> set preamble {
> #include <arm_sve.h>
>
> -#pragma GCC target "+i8mm+f32mm+f64mm+sve2+sve2-bitperm+sve2-
> sm4+sve2-aes+sve2-sha3+sme"
> +#pragma GCC target "+i8mm+f32mm+f64mm+sve2+sve2-bitperm+sve2-
> sm4+sve2-aes+sve2-sha3+sme+ssve-bitperm"
Isn't sve2-bitperm redundant here? Since the docs say:
"When FEAT_SSVE_BitPerm and FEAT_SVE2 is implemented, FEAT_SVE_BitPerm is
implemented."
Ok with those changes if the prereq were accepted.
Thanks,
Tamar
>
> extern svbool_t &pred;
>
> @@ -145,6 +145,9 @@ proc check_ssve_calls { harness calls should_pass } {
> set streaming_ok {
> s8 = svadd_x (pred, s8, s8)
> s8 = svld1 (pred, s8_ptr)
> + u8 = svbdep (u8, u8)
> + u8 = svbext (u8, u8)
> + u8 = svbgrp (u8, u8)
> }
>
> # This order follows the list in the SME manual.
> @@ -161,10 +164,7 @@ set nonstreaming_only {
> u8 = svaese (u8, u8)
> u8 = svaesimc (u8)
> u8 = svaesmc (u8)
> - u8 = svbdep (u8, u8)
> - u8 = svbext (u8, u8)
> f32 = svbfmmla (f32, bf16, bf16)
> - u8 = svbgrp (u8, u8)
> u32 = svcompact (pred, u32)
> f32 = svadda (pred, 1.0f, f32)
> f32 = svexpa (u32)
> diff --git a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_5.c
> b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_5.c
> index b15d1c95398..bb83ab434b5 100644
> --- a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_5.c
> +++ b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_5.c
> @@ -214,6 +214,17 @@
> #endif
> #pragma GCC pop_options
>
> +#pragma GCC push_options
> +#pragma GCC target "arch=armv8-a+sve2+ssve-bitperm"
> +#ifndef __ARM_FEATURE_SSVE_BITPERM
> +#error Foo
> +#endif
> +
> +#ifndef __ARM_FEATURE_SVE2_BITPERM
> +#error Foo
> +#endif
> +#pragma GCC pop_options
> +
> int
> foo (int a)
> {
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u16.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u16.c
> new file mode 100644
> index 00000000000..33f148b3596
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u16.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bdep_u16_tied1:
> +** bdep z0\.h, z0\.h, z1\.h
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u16_tied1, svuint16_t,
> + z0 = svbdep_u16 (z0, z1),
> + z0 = svbdep (z0, z1))
> +
> +/*
> +** bdep_u16_tied2:
> +** bdep z0\.h, z1\.h, z0\.h
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u16_tied2, svuint16_t,
> + z0 = svbdep_u16 (z1, z0),
> + z0 = svbdep (z1, z0))
> +
> +/*
> +** bdep_u16_untied:
> +** bdep z0\.h, z1\.h, z2\.h
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u16_untied, svuint16_t,
> + z0 = svbdep_u16 (z1, z2),
> + z0 = svbdep (z1, z2))
> +
> +/*
> +** bdep_w0_u16_tied1:
> +** mov (z[0-9]+\.h), w0
> +** bdep z0\.h, z0\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bdep_w0_u16_tied1, svuint16_t, uint16_t,
> + z0 = svbdep_n_u16 (z0, x0),
> + z0 = svbdep (z0, x0))
> +
> +/*
> +** bdep_w0_u16_untied:
> +** mov (z[0-9]+\.h), w0
> +** bdep z0\.h, z1\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bdep_w0_u16_untied, svuint16_t, uint16_t,
> + z0 = svbdep_n_u16 (z1, x0),
> + z0 = svbdep (z1, x0))
> +
> +/*
> +** bdep_11_u16_tied1:
> +** mov (z[0-9]+\.h), #11
> +** bdep z0\.h, z0\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_11_u16_tied1, svuint16_t,
> + z0 = svbdep_n_u16 (z0, 11),
> + z0 = svbdep (z0, 11))
> +
> +/*
> +** bdep_11_u16_untied:
> +** mov (z[0-9]+\.h), #11
> +** bdep z0\.h, z1\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_11_u16_untied, svuint16_t,
> + z0 = svbdep_n_u16 (z1, 11),
> + z0 = svbdep (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u32.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u32.c
> new file mode 100644
> index 00000000000..69af58b1da0
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u32.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bdep_u32_tied1:
> +** bdep z0\.s, z0\.s, z1\.s
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u32_tied1, svuint32_t,
> + z0 = svbdep_u32 (z0, z1),
> + z0 = svbdep (z0, z1))
> +
> +/*
> +** bdep_u32_tied2:
> +** bdep z0\.s, z1\.s, z0\.s
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u32_tied2, svuint32_t,
> + z0 = svbdep_u32 (z1, z0),
> + z0 = svbdep (z1, z0))
> +
> +/*
> +** bdep_u32_untied:
> +** bdep z0\.s, z1\.s, z2\.s
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u32_untied, svuint32_t,
> + z0 = svbdep_u32 (z1, z2),
> + z0 = svbdep (z1, z2))
> +
> +/*
> +** bdep_w0_u32_tied1:
> +** mov (z[0-9]+\.s), w0
> +** bdep z0\.s, z0\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bdep_w0_u32_tied1, svuint32_t, uint32_t,
> + z0 = svbdep_n_u32 (z0, x0),
> + z0 = svbdep (z0, x0))
> +
> +/*
> +** bdep_w0_u32_untied:
> +** mov (z[0-9]+\.s), w0
> +** bdep z0\.s, z1\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bdep_w0_u32_untied, svuint32_t, uint32_t,
> + z0 = svbdep_n_u32 (z1, x0),
> + z0 = svbdep (z1, x0))
> +
> +/*
> +** bdep_11_u32_tied1:
> +** mov (z[0-9]+\.s), #11
> +** bdep z0\.s, z0\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_11_u32_tied1, svuint32_t,
> + z0 = svbdep_n_u32 (z0, 11),
> + z0 = svbdep (z0, 11))
> +
> +/*
> +** bdep_11_u32_untied:
> +** mov (z[0-9]+\.s), #11
> +** bdep z0\.s, z1\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_11_u32_untied, svuint32_t,
> + z0 = svbdep_n_u32 (z1, 11),
> + z0 = svbdep (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u64.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u64.c
> new file mode 100644
> index 00000000000..7c2dd848e0f
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u64.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bdep_u64_tied1:
> +** bdep z0\.d, z0\.d, z1\.d
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u64_tied1, svuint64_t,
> + z0 = svbdep_u64 (z0, z1),
> + z0 = svbdep (z0, z1))
> +
> +/*
> +** bdep_u64_tied2:
> +** bdep z0\.d, z1\.d, z0\.d
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u64_tied2, svuint64_t,
> + z0 = svbdep_u64 (z1, z0),
> + z0 = svbdep (z1, z0))
> +
> +/*
> +** bdep_u64_untied:
> +** bdep z0\.d, z1\.d, z2\.d
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u64_untied, svuint64_t,
> + z0 = svbdep_u64 (z1, z2),
> + z0 = svbdep (z1, z2))
> +
> +/*
> +** bdep_x0_u64_tied1:
> +** mov (z[0-9]+\.d), x0
> +** bdep z0\.d, z0\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bdep_x0_u64_tied1, svuint64_t, uint64_t,
> + z0 = svbdep_n_u64 (z0, x0),
> + z0 = svbdep (z0, x0))
> +
> +/*
> +** bdep_x0_u64_untied:
> +** mov (z[0-9]+\.d), x0
> +** bdep z0\.d, z1\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bdep_x0_u64_untied, svuint64_t, uint64_t,
> + z0 = svbdep_n_u64 (z1, x0),
> + z0 = svbdep (z1, x0))
> +
> +/*
> +** bdep_11_u64_tied1:
> +** mov (z[0-9]+\.d), #11
> +** bdep z0\.d, z0\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_11_u64_tied1, svuint64_t,
> + z0 = svbdep_n_u64 (z0, 11),
> + z0 = svbdep (z0, 11))
> +
> +/*
> +** bdep_11_u64_untied:
> +** mov (z[0-9]+\.d), #11
> +** bdep z0\.d, z1\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_11_u64_untied, svuint64_t,
> + z0 = svbdep_n_u64 (z1, 11),
> + z0 = svbdep (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u8.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u8.c
> new file mode 100644
> index 00000000000..e401eb029f9
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bdep_u8.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bdep_u8_tied1:
> +** bdep z0\.b, z0\.b, z1\.b
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u8_tied1, svuint8_t,
> + z0 = svbdep_u8 (z0, z1),
> + z0 = svbdep (z0, z1))
> +
> +/*
> +** bdep_u8_tied2:
> +** bdep z0\.b, z1\.b, z0\.b
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u8_tied2, svuint8_t,
> + z0 = svbdep_u8 (z1, z0),
> + z0 = svbdep (z1, z0))
> +
> +/*
> +** bdep_u8_untied:
> +** bdep z0\.b, z1\.b, z2\.b
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_u8_untied, svuint8_t,
> + z0 = svbdep_u8 (z1, z2),
> + z0 = svbdep (z1, z2))
> +
> +/*
> +** bdep_w0_u8_tied1:
> +** mov (z[0-9]+\.b), w0
> +** bdep z0\.b, z0\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bdep_w0_u8_tied1, svuint8_t, uint8_t,
> + z0 = svbdep_n_u8 (z0, x0),
> + z0 = svbdep (z0, x0))
> +
> +/*
> +** bdep_w0_u8_untied:
> +** mov (z[0-9]+\.b), w0
> +** bdep z0\.b, z1\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bdep_w0_u8_untied, svuint8_t, uint8_t,
> + z0 = svbdep_n_u8 (z1, x0),
> + z0 = svbdep (z1, x0))
> +
> +/*
> +** bdep_11_u8_tied1:
> +** mov (z[0-9]+\.b), #11
> +** bdep z0\.b, z0\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_11_u8_tied1, svuint8_t,
> + z0 = svbdep_n_u8 (z0, 11),
> + z0 = svbdep (z0, 11))
> +
> +/*
> +** bdep_11_u8_untied:
> +** mov (z[0-9]+\.b), #11
> +** bdep z0\.b, z1\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bdep_11_u8_untied, svuint8_t,
> + z0 = svbdep_n_u8 (z1, 11),
> + z0 = svbdep (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u16.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u16.c
> new file mode 100644
> index 00000000000..05b4121a428
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u16.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bext_u16_tied1:
> +** bext z0\.h, z0\.h, z1\.h
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u16_tied1, svuint16_t,
> + z0 = svbext_u16 (z0, z1),
> + z0 = svbext (z0, z1))
> +
> +/*
> +** bext_u16_tied2:
> +** bext z0\.h, z1\.h, z0\.h
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u16_tied2, svuint16_t,
> + z0 = svbext_u16 (z1, z0),
> + z0 = svbext (z1, z0))
> +
> +/*
> +** bext_u16_untied:
> +** bext z0\.h, z1\.h, z2\.h
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u16_untied, svuint16_t,
> + z0 = svbext_u16 (z1, z2),
> + z0 = svbext (z1, z2))
> +
> +/*
> +** bext_w0_u16_tied1:
> +** mov (z[0-9]+\.h), w0
> +** bext z0\.h, z0\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bext_w0_u16_tied1, svuint16_t, uint16_t,
> + z0 = svbext_n_u16 (z0, x0),
> + z0 = svbext (z0, x0))
> +
> +/*
> +** bext_w0_u16_untied:
> +** mov (z[0-9]+\.h), w0
> +** bext z0\.h, z1\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bext_w0_u16_untied, svuint16_t, uint16_t,
> + z0 = svbext_n_u16 (z1, x0),
> + z0 = svbext (z1, x0))
> +
> +/*
> +** bext_11_u16_tied1:
> +** mov (z[0-9]+\.h), #11
> +** bext z0\.h, z0\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_11_u16_tied1, svuint16_t,
> + z0 = svbext_n_u16 (z0, 11),
> + z0 = svbext (z0, 11))
> +
> +/*
> +** bext_11_u16_untied:
> +** mov (z[0-9]+\.h), #11
> +** bext z0\.h, z1\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_11_u16_untied, svuint16_t,
> + z0 = svbext_n_u16 (z1, 11),
> + z0 = svbext (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u32.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u32.c
> new file mode 100644
> index 00000000000..ea340772237
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u32.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bext_u32_tied1:
> +** bext z0\.s, z0\.s, z1\.s
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u32_tied1, svuint32_t,
> + z0 = svbext_u32 (z0, z1),
> + z0 = svbext (z0, z1))
> +
> +/*
> +** bext_u32_tied2:
> +** bext z0\.s, z1\.s, z0\.s
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u32_tied2, svuint32_t,
> + z0 = svbext_u32 (z1, z0),
> + z0 = svbext (z1, z0))
> +
> +/*
> +** bext_u32_untied:
> +** bext z0\.s, z1\.s, z2\.s
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u32_untied, svuint32_t,
> + z0 = svbext_u32 (z1, z2),
> + z0 = svbext (z1, z2))
> +
> +/*
> +** bext_w0_u32_tied1:
> +** mov (z[0-9]+\.s), w0
> +** bext z0\.s, z0\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bext_w0_u32_tied1, svuint32_t, uint32_t,
> + z0 = svbext_n_u32 (z0, x0),
> + z0 = svbext (z0, x0))
> +
> +/*
> +** bext_w0_u32_untied:
> +** mov (z[0-9]+\.s), w0
> +** bext z0\.s, z1\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bext_w0_u32_untied, svuint32_t, uint32_t,
> + z0 = svbext_n_u32 (z1, x0),
> + z0 = svbext (z1, x0))
> +
> +/*
> +** bext_11_u32_tied1:
> +** mov (z[0-9]+\.s), #11
> +** bext z0\.s, z0\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_11_u32_tied1, svuint32_t,
> + z0 = svbext_n_u32 (z0, 11),
> + z0 = svbext (z0, 11))
> +
> +/*
> +** bext_11_u32_untied:
> +** mov (z[0-9]+\.s), #11
> +** bext z0\.s, z1\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_11_u32_untied, svuint32_t,
> + z0 = svbext_n_u32 (z1, 11),
> + z0 = svbext (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u64.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u64.c
> new file mode 100644
> index 00000000000..379bfb2e2f4
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u64.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bext_u64_tied1:
> +** bext z0\.d, z0\.d, z1\.d
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u64_tied1, svuint64_t,
> + z0 = svbext_u64 (z0, z1),
> + z0 = svbext (z0, z1))
> +
> +/*
> +** bext_u64_tied2:
> +** bext z0\.d, z1\.d, z0\.d
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u64_tied2, svuint64_t,
> + z0 = svbext_u64 (z1, z0),
> + z0 = svbext (z1, z0))
> +
> +/*
> +** bext_u64_untied:
> +** bext z0\.d, z1\.d, z2\.d
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u64_untied, svuint64_t,
> + z0 = svbext_u64 (z1, z2),
> + z0 = svbext (z1, z2))
> +
> +/*
> +** bext_x0_u64_tied1:
> +** mov (z[0-9]+\.d), x0
> +** bext z0\.d, z0\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bext_x0_u64_tied1, svuint64_t, uint64_t,
> + z0 = svbext_n_u64 (z0, x0),
> + z0 = svbext (z0, x0))
> +
> +/*
> +** bext_x0_u64_untied:
> +** mov (z[0-9]+\.d), x0
> +** bext z0\.d, z1\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bext_x0_u64_untied, svuint64_t, uint64_t,
> + z0 = svbext_n_u64 (z1, x0),
> + z0 = svbext (z1, x0))
> +
> +/*
> +** bext_11_u64_tied1:
> +** mov (z[0-9]+\.d), #11
> +** bext z0\.d, z0\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_11_u64_tied1, svuint64_t,
> + z0 = svbext_n_u64 (z0, 11),
> + z0 = svbext (z0, 11))
> +
> +/*
> +** bext_11_u64_untied:
> +** mov (z[0-9]+\.d), #11
> +** bext z0\.d, z1\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_11_u64_untied, svuint64_t,
> + z0 = svbext_n_u64 (z1, 11),
> + z0 = svbext (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u8.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u8.c
> new file mode 100644
> index 00000000000..210f9f70cdb
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bext_u8.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bext_u8_tied1:
> +** bext z0\.b, z0\.b, z1\.b
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u8_tied1, svuint8_t,
> + z0 = svbext_u8 (z0, z1),
> + z0 = svbext (z0, z1))
> +
> +/*
> +** bext_u8_tied2:
> +** bext z0\.b, z1\.b, z0\.b
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u8_tied2, svuint8_t,
> + z0 = svbext_u8 (z1, z0),
> + z0 = svbext (z1, z0))
> +
> +/*
> +** bext_u8_untied:
> +** bext z0\.b, z1\.b, z2\.b
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_u8_untied, svuint8_t,
> + z0 = svbext_u8 (z1, z2),
> + z0 = svbext (z1, z2))
> +
> +/*
> +** bext_w0_u8_tied1:
> +** mov (z[0-9]+\.b), w0
> +** bext z0\.b, z0\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bext_w0_u8_tied1, svuint8_t, uint8_t,
> + z0 = svbext_n_u8 (z0, x0),
> + z0 = svbext (z0, x0))
> +
> +/*
> +** bext_w0_u8_untied:
> +** mov (z[0-9]+\.b), w0
> +** bext z0\.b, z1\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bext_w0_u8_untied, svuint8_t, uint8_t,
> + z0 = svbext_n_u8 (z1, x0),
> + z0 = svbext (z1, x0))
> +
> +/*
> +** bext_11_u8_tied1:
> +** mov (z[0-9]+\.b), #11
> +** bext z0\.b, z0\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_11_u8_tied1, svuint8_t,
> + z0 = svbext_n_u8 (z0, 11),
> + z0 = svbext (z0, 11))
> +
> +/*
> +** bext_11_u8_untied:
> +** mov (z[0-9]+\.b), #11
> +** bext z0\.b, z1\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bext_11_u8_untied, svuint8_t,
> + z0 = svbext_n_u8 (z1, 11),
> + z0 = svbext (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u16.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u16.c
> new file mode 100644
> index 00000000000..7ca93671e16
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u16.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bgrp_u16_tied1:
> +** bgrp z0\.h, z0\.h, z1\.h
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u16_tied1, svuint16_t,
> + z0 = svbgrp_u16 (z0, z1),
> + z0 = svbgrp (z0, z1))
> +
> +/*
> +** bgrp_u16_tied2:
> +** bgrp z0\.h, z1\.h, z0\.h
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u16_tied2, svuint16_t,
> + z0 = svbgrp_u16 (z1, z0),
> + z0 = svbgrp (z1, z0))
> +
> +/*
> +** bgrp_u16_untied:
> +** bgrp z0\.h, z1\.h, z2\.h
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u16_untied, svuint16_t,
> + z0 = svbgrp_u16 (z1, z2),
> + z0 = svbgrp (z1, z2))
> +
> +/*
> +** bgrp_w0_u16_tied1:
> +** mov (z[0-9]+\.h), w0
> +** bgrp z0\.h, z0\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bgrp_w0_u16_tied1, svuint16_t, uint16_t,
> + z0 = svbgrp_n_u16 (z0, x0),
> + z0 = svbgrp (z0, x0))
> +
> +/*
> +** bgrp_w0_u16_untied:
> +** mov (z[0-9]+\.h), w0
> +** bgrp z0\.h, z1\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bgrp_w0_u16_untied, svuint16_t, uint16_t,
> + z0 = svbgrp_n_u16 (z1, x0),
> + z0 = svbgrp (z1, x0))
> +
> +/*
> +** bgrp_11_u16_tied1:
> +** mov (z[0-9]+\.h), #11
> +** bgrp z0\.h, z0\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_11_u16_tied1, svuint16_t,
> + z0 = svbgrp_n_u16 (z0, 11),
> + z0 = svbgrp (z0, 11))
> +
> +/*
> +** bgrp_11_u16_untied:
> +** mov (z[0-9]+\.h), #11
> +** bgrp z0\.h, z1\.h, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_11_u16_untied, svuint16_t,
> + z0 = svbgrp_n_u16 (z1, 11),
> + z0 = svbgrp (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u32.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u32.c
> new file mode 100644
> index 00000000000..1b8ccf420fb
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u32.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bgrp_u32_tied1:
> +** bgrp z0\.s, z0\.s, z1\.s
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u32_tied1, svuint32_t,
> + z0 = svbgrp_u32 (z0, z1),
> + z0 = svbgrp (z0, z1))
> +
> +/*
> +** bgrp_u32_tied2:
> +** bgrp z0\.s, z1\.s, z0\.s
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u32_tied2, svuint32_t,
> + z0 = svbgrp_u32 (z1, z0),
> + z0 = svbgrp (z1, z0))
> +
> +/*
> +** bgrp_u32_untied:
> +** bgrp z0\.s, z1\.s, z2\.s
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u32_untied, svuint32_t,
> + z0 = svbgrp_u32 (z1, z2),
> + z0 = svbgrp (z1, z2))
> +
> +/*
> +** bgrp_w0_u32_tied1:
> +** mov (z[0-9]+\.s), w0
> +** bgrp z0\.s, z0\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bgrp_w0_u32_tied1, svuint32_t, uint32_t,
> + z0 = svbgrp_n_u32 (z0, x0),
> + z0 = svbgrp (z0, x0))
> +
> +/*
> +** bgrp_w0_u32_untied:
> +** mov (z[0-9]+\.s), w0
> +** bgrp z0\.s, z1\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bgrp_w0_u32_untied, svuint32_t, uint32_t,
> + z0 = svbgrp_n_u32 (z1, x0),
> + z0 = svbgrp (z1, x0))
> +
> +/*
> +** bgrp_11_u32_tied1:
> +** mov (z[0-9]+\.s), #11
> +** bgrp z0\.s, z0\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_11_u32_tied1, svuint32_t,
> + z0 = svbgrp_n_u32 (z0, 11),
> + z0 = svbgrp (z0, 11))
> +
> +/*
> +** bgrp_11_u32_untied:
> +** mov (z[0-9]+\.s), #11
> +** bgrp z0\.s, z1\.s, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_11_u32_untied, svuint32_t,
> + z0 = svbgrp_n_u32 (z1, 11),
> + z0 = svbgrp (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u64.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u64.c
> new file mode 100644
> index 00000000000..77b37011b24
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u64.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bgrp_u64_tied1:
> +** bgrp z0\.d, z0\.d, z1\.d
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u64_tied1, svuint64_t,
> + z0 = svbgrp_u64 (z0, z1),
> + z0 = svbgrp (z0, z1))
> +
> +/*
> +** bgrp_u64_tied2:
> +** bgrp z0\.d, z1\.d, z0\.d
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u64_tied2, svuint64_t,
> + z0 = svbgrp_u64 (z1, z0),
> + z0 = svbgrp (z1, z0))
> +
> +/*
> +** bgrp_u64_untied:
> +** bgrp z0\.d, z1\.d, z2\.d
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u64_untied, svuint64_t,
> + z0 = svbgrp_u64 (z1, z2),
> + z0 = svbgrp (z1, z2))
> +
> +/*
> +** bgrp_x0_u64_tied1:
> +** mov (z[0-9]+\.d), x0
> +** bgrp z0\.d, z0\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bgrp_x0_u64_tied1, svuint64_t, uint64_t,
> + z0 = svbgrp_n_u64 (z0, x0),
> + z0 = svbgrp (z0, x0))
> +
> +/*
> +** bgrp_x0_u64_untied:
> +** mov (z[0-9]+\.d), x0
> +** bgrp z0\.d, z1\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bgrp_x0_u64_untied, svuint64_t, uint64_t,
> + z0 = svbgrp_n_u64 (z1, x0),
> + z0 = svbgrp (z1, x0))
> +
> +/*
> +** bgrp_11_u64_tied1:
> +** mov (z[0-9]+\.d), #11
> +** bgrp z0\.d, z0\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_11_u64_tied1, svuint64_t,
> + z0 = svbgrp_n_u64 (z0, 11),
> + z0 = svbgrp (z0, 11))
> +
> +/*
> +** bgrp_11_u64_untied:
> +** mov (z[0-9]+\.d), #11
> +** bgrp z0\.d, z1\.d, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_11_u64_untied, svuint64_t,
> + z0 = svbgrp_n_u64 (z1, 11),
> + z0 = svbgrp (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u8.c
> b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u8.c
> new file mode 100644
> index 00000000000..d4abcd1bbbf
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bgrp_u8.c
> @@ -0,0 +1,74 @@
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
> +
> +#include "test_sme2_acle.h"
> +
> +#pragma GCC target "+sve2+ssve-bitperm"
> +
> +/*
> +** bgrp_u8_tied1:
> +** bgrp z0\.b, z0\.b, z1\.b
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u8_tied1, svuint8_t,
> + z0 = svbgrp_u8 (z0, z1),
> + z0 = svbgrp (z0, z1))
> +
> +/*
> +** bgrp_u8_tied2:
> +** bgrp z0\.b, z1\.b, z0\.b
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u8_tied2, svuint8_t,
> + z0 = svbgrp_u8 (z1, z0),
> + z0 = svbgrp (z1, z0))
> +
> +/*
> +** bgrp_u8_untied:
> +** bgrp z0\.b, z1\.b, z2\.b
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_u8_untied, svuint8_t,
> + z0 = svbgrp_u8 (z1, z2),
> + z0 = svbgrp (z1, z2))
> +
> +/*
> +** bgrp_w0_u8_tied1:
> +** mov (z[0-9]+\.b), w0
> +** bgrp z0\.b, z0\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bgrp_w0_u8_tied1, svuint8_t, uint8_t,
> + z0 = svbgrp_n_u8 (z0, x0),
> + z0 = svbgrp (z0, x0))
> +
> +/*
> +** bgrp_w0_u8_untied:
> +** mov (z[0-9]+\.b), w0
> +** bgrp z0\.b, z1\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_ZX (bgrp_w0_u8_untied, svuint8_t, uint8_t,
> + z0 = svbgrp_n_u8 (z1, x0),
> + z0 = svbgrp (z1, x0))
> +
> +/*
> +** bgrp_11_u8_tied1:
> +** mov (z[0-9]+\.b), #11
> +** bgrp z0\.b, z0\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_11_u8_tied1, svuint8_t,
> + z0 = svbgrp_n_u8 (z0, 11),
> + z0 = svbgrp (z0, 11))
> +
> +/*
> +** bgrp_11_u8_untied:
> +** mov (z[0-9]+\.b), #11
> +** bgrp z0\.b, z1\.b, \1
> +** ret
> +*/
> +TEST_UNIFORM_Z (bgrp_11_u8_untied, svuint8_t,
> + z0 = svbgrp_n_u8 (z1, 11),
> + z0 = svbgrp (z1, 11))
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u16.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u16.c
> index c1a4e10614f..13e9f69ddf4 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u16.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u16.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bdep_u16_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u32.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u32.c
> index 4f14cc4c432..07f3743c507 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u32.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u32.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bdep_u32_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u64.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u64.c
> index 091253ec60b..f43161436a6 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u64.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u64.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bdep_u64_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u8.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u8.c
> index deb1ad27d90..f7b25e89b6c 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u8.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bdep_u8.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bdep_u8_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u16.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u16.c
> index 9efa501efa8..dfba13195e1 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u16.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u16.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bext_u16_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u32.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u32.c
> index 18963da5bd3..d85c6001497 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u32.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u32.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bext_u32_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u64.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u64.c
> index 91591f93b88..4f116cda911 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u64.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u64.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bext_u64_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u8.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u8.c
> index 1211587ef41..ab3b7597360 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u8.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bext_u8.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bext_u8_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u16.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u16.c
> index 72868bea7f6..ea4aff89c77 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u16.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u16.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bgrp_u16_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u32.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u32.c
> index c8923816fe4..5c61236d546 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u32.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u32.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bgrp_u32_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u64.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u64.c
> index 86989529faf..e96ae5c275a 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u64.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u64.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bgrp_u64_tied1:
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u8.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u8.c
> index 5cd941a7a6e..55ea7a906e1 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u8.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/bgrp_u8.c
> @@ -1,9 +1,14 @@
> -/* { dg-skip-if "" { *-*-* } { "-DSTREAMING_COMPATIBLE" } { "" } } */
> +/* { dg-do assemble { target aarch64_asm_ssve-bitperm_ok } } */
> +/* { dg-do compile { target { ! aarch64_asm_ssve-bitperm_ok } } } */
> /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
>
> #include "test_sve_acle.h"
>
> +#ifdef STREAMING_COMPATIBLE
> +#pragma GCC target "+sve2+ssve-bitperm"
> +#else
> #pragma GCC target "+sve2-bitperm"
> +#endif
>
> /*
> ** bgrp_u8_tied1:
> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-
> supports.exp
> index 9c2d71137a0..081563193fd 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -12544,7 +12544,7 @@ set exts {
> # archiecture for SME and the features that require it.
> set exts_sve2 {
> "sme-b16b16" "sme-f16f16" "sme-i16i64" "sme" "sme2" "sme2p1"
> - "ssve-fp8dot2" "ssve-fp8dot4" "ssve-fp8fma"
> + "ssve-fp8dot2" "ssve-fp8dot4" "ssve-fp8fma" "ssve-bitperm"
> }
>
> foreach { aarch64_ext } $exts {
> --
> 2.34.1
