Changes v1 → v2:
* Added a check in gcc/configure.ac to apply the patch only if the
assembler supports DTPREL relocations.
* Added a target check to verify whether the assembler supports
".xword %dtprel(symbol)".
------------------------------
Hi,
This patch fixes the missing debuginfo for the TLS variables by emitting
".xword %dtprel(symbol)" along with DW_AT_location in .debug_info section.
Support for the assembler directive ".xword %dtprel(symbol)" was recently
introduced. To prevent assembler errors when building GCC with older
versions of binutils, the patch adds a configure check that skips these
changes if the assembler does not support ".xword %dtprel(symbol)".
Regression tested on aarch64-linux-gnu and found no regressions.
Ok for trunk ? And also backport to other GCC versions?
Regards,
Srinath
gcc/ChangeLog:
PR target/97344
* config.in: Re-generate.
* config/aarch64/aarch64.cc (aarch64_output_dwarf_dtprel): Define
function.
(TARGET_ASM_OUTPUT_DWARF_DTPREL): Define macro.
* configure: Re-generate.
* configure.ac: Add assembler check for dtprel relocation.
gcc/testsuite/ChangeLog:
PR target/97344
* gcc.target/aarch64/pr97344.c: New test.
* lib/target-supports.exp (aarch64_gas_has_dtprel_reloc): Add new target
check.
---
gcc/config.in | 6 ++++
gcc/config/aarch64/aarch64.cc | 16 ++++++++++
gcc/configure | 34 ++++++++++++++++++++++
gcc/configure.ac | 6 ++++
gcc/testsuite/gcc.target/aarch64/pr97344.c | 26 +++++++++++++++++
gcc/testsuite/lib/target-supports.exp | 11 +++++++
6 files changed, 99 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr97344.c
diff --git a/gcc/config.in b/gcc/config.in
index a4fd5e0c108..a52bb0e56c6 100644
--- a/gcc/config.in
+++ b/gcc/config.in
@@ -446,6 +446,12 @@
#endif
+/* Define if your assembler supports DTPREL relocation. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_DTPREL_RELOC
+#endif
+
+
/* Define if your assembler supports dwarf2 .file/.loc directives, and
preserves file table indices exactly as given. */
#ifndef USED_FOR_TARGET
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 3816df92b18..834b1d134f4 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -1562,6 +1562,17 @@ aarch64_debugger_regno (unsigned regno)
return DWARF_FRAME_REGISTERS;
}
+/* Implementation of TARGET_ASM_OUTPUT_DWARF_DTPREL. */
+static void
+aarch64_output_dwarf_dtprel (FILE *f, int size, rtx x)
+{
+ gcc_assert (size == 8);
+ fputs ("\t.xword\t", f);
+ fputs ("%dtprel(", f);
+ output_addr_const (f, x);
+ fputs (")", f);
+}
+
/* Implement TARGET_DWARF_FRAME_REG_MODE. */
static machine_mode
aarch64_dwarf_frame_reg_mode (int regno)
@@ -33641,6 +33652,11 @@ aarch64_libgcc_floating_mode_supported_p
#undef TARGET_DWARF_FRAME_REG_MODE
#define TARGET_DWARF_FRAME_REG_MODE aarch64_dwarf_frame_reg_mode
+#if defined(HAVE_AS_TLS) && defined(HAVE_AS_DTPREL_RELOC)
+#undef TARGET_ASM_OUTPUT_DWARF_DTPREL
+#define TARGET_ASM_OUTPUT_DWARF_DTPREL aarch64_output_dwarf_dtprel
+#endif
+
#undef TARGET_OUTPUT_CFI_DIRECTIVE
#define TARGET_OUTPUT_CFI_DIRECTIVE aarch64_output_cfi_directive
diff --git a/gcc/configure b/gcc/configure
index 3cf0d0b5d1c..b1395840172 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -28839,6 +28839,40 @@ if test $gcc_cv_as_aarch64_aeabi_build_attributes = yes; then
$as_echo "#define HAVE_AS_AEABI_BUILD_ATTRIBUTES 1" >>confdefs.h
+fi
+
+ # Check if we have binutils support for DTPREL relocation.
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for support of DTPREL relocation" >&5
+$as_echo_n "checking assembler for support of DTPREL relocation... " >&6; }
+if ${gcc_cv_as_aarch64_dtprel_relocation+:} false; then :
+ $as_echo_n "(cached) " >&6
+else
+ gcc_cv_as_aarch64_dtprel_relocation=no
+ if test x"$gcc_cv_as" != x; then
+ $as_echo '
+ .xword %dtprel(expr)
+ ' > conftest.s
+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5'
+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; }
+ then
+ gcc_cv_as_aarch64_dtprel_relocation=yes
+ else
+ echo "configure: failed program was" >&5
+ cat conftest.s >&5
+ fi
+ rm -f conftest.o conftest.s
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_aarch64_dtprel_relocation" >&5
+$as_echo "$gcc_cv_as_aarch64_dtprel_relocation" >&6; }
+if test $gcc_cv_as_aarch64_dtprel_relocation = yes; then
+
+$as_echo "#define HAVE_AS_DTPREL_RELOC 1" >>confdefs.h
+
fi
# Enable Branch Target Identification Mechanism and Return Address
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 5600a100376..5b810afff52 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -4560,6 +4560,12 @@ case "$target" in
.aeabi_attribute Tag_Feature_GCS, 1
],,[AC_DEFINE(HAVE_AS_AEABI_BUILD_ATTRIBUTES, 1,
[Define if your assembler supports AEABI build attributes.])])
+ # Check if we have binutils support for DTPREL relocation.
+ gcc_GAS_CHECK_FEATURE([support of DTPREL relocation], gcc_cv_as_aarch64_dtprel_relocation,,
+ [
+ .xword %dtprel(expr)
+ ],,[AC_DEFINE(HAVE_AS_DTPREL_RELOC, 1,
+ [Define if your assembler supports DTPREL relocation.])])
# Enable Branch Target Identification Mechanism and Return Address
# Signing by default.
AC_ARG_ENABLE(standard-branch-protection,
diff --git a/gcc/testsuite/gcc.target/aarch64/pr97344.c b/gcc/testsuite/gcc.target/aarch64/pr97344.c
new file mode 100644
index 00000000000..1147ee32b61
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr97344.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target aarch64_gas_has_dtprel_reloc } */
+/* { dg-options "-O0 -g" } */
+
+#include <stdio.h>
+
+__thread unsigned long rage = 1;
+__thread unsigned long ire = 2;
+
+void*
+increase_rage()
+{
+ ++rage;
+ ++ire;
+ printf ("Rage counter for: %d/%d\n", rage, ire);
+}
+
+int
+main ()
+{
+ increase_rage();
+ printf ("Rage counter %d/%d\n", rage, ire);
+}
+
+/* { dg-final { scan-assembler ".xword\t%dtprel\\(rage\\)" } } */
+/* { dg-final { scan-assembler ".xword\t%dtprel\\(ire\\)" } } */
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 01582621f84..0282f7c12e9 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -12765,6 +12765,17 @@ proc check_effective_target_aarch64_gas_has_build_attributes { } {
}]
}
+# Return 1 if Gas supports DTPREL Relocation on AArch64 target
+proc check_effective_target_aarch64_gas_has_dtprel_reloc { } {
+ if { ![istarget aarch64*-*-*] && ![check_effective_target_tls_native] } {
+ return 0
+ }
+ return [check_no_compiler_messages aarch64_gas_has_dtprel_reloc object {
+ /* Assembly */
+ .xword %dtprel(expr)
+ }]
+}
+
# Create functions to check that the AArch64 assembler supports the
# various architecture extensions via the .arch_extension pseudo-op.
