On Fri, May 8, 2026 at 2:08 PM Takayuki 'January June' Suwa <[email protected]> wrote: > > Since the commit of the preceding patch for IRA, "ira: Scale save/restore > costs of callee save registers with block frequency" > (3b9b8d6cfdf59337f4b7ce10ce92a98044b2657b), > the Xtensa ISA has shown a tendency to allocate slightly more function stack > frames, especially when using the CALL0 ABI. > > /* example */ > extern void foo(void); > int test(int a) { > int array[252]; > foo(); > asm volatile (""::"m"(array)); > return a; > } > > ;; before (-O2 -mabi=call0) > test: > addi sp, sp, -16 > s32i.n a0, sp, 12 > addmi sp, sp, -0x400 > s32i a2, sp, 1008 > call0 foo > l32i a2, sp, 1008 > addmi sp, sp, 0x400 > l32i.n a0, sp, 12 > addi sp, sp, 16 > ret.n > > This patch disables the incorrect register save cost estimation in function > prologues/epilogues by defining the HONOR_REG_ALLOC_ORDER macro as 1. > > ;; after (-O2 -mabi=call0) > test: > addmi sp, sp, -0x400 > s32i a0, sp, 1020 > s32i a2, sp, 1016 > call0 foo > l32i a2, sp, 1016 > l32i a0, sp, 1020 > addmi sp, sp, 0x400 > ret.n > > gcc/ChangeLog: > > * config/xtensa/xtensa.h (HONOR_REG_ALLOC_ORDER): > New macro definition. > > gcc/testsuite/ChangeLog: > > * gcc.target/xtensa/elim_callee_saved.c: > Revise the test item for the number of mov instructions in the > assembler output. > --- > gcc/config/xtensa/xtensa.h | 4 ++++ > gcc/testsuite/gcc.target/xtensa/elim_callee_saved.c | 2 +- > 2 files changed, 5 insertions(+), 1 deletion(-)
Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master. -- Thanks. -- Max
