Hi gcc-patches mailing list, Karl Meakin via Sourceware Forge <[email protected]> has requested that the following forgejo pull request be published on the mailing list.
Created on: 2026-05-13 15:39:36+00:00 Latest update: 2026-05-14 18:24:48+00:00 Changes: 120 changed files, 20499 additions, 16798 deletions Head revision: karmea01/gcc-TEST ref dsg/karmea01/neon-port commit 20186babc48732a8188383c316d0440cb3a2bc41 Base revision: gcc/gcc-TEST ref trunk commit ecfbd7d1b92886024ac6e94000425b3cd0bd0194 r17-500-gecfbd7d1b92886 Merge base: ecfbd7d1b92886024ac6e94000425b3cd0bd0194 Full diff url: https://forge.sourceware.org/gcc/gcc-TEST/pulls/158.diff Discussion: https://forge.sourceware.org/gcc/gcc-TEST/pulls/158 Requested Reviewers: rdfm, pinskia This patch is a proof of concept patch which ports a few NEON intrinsics (intrinsics defined in `arm_neon.h`) to the "pragma-based" framework used by SVE/SME intrinsics. If successful, I will follow up with further patches porting the rest. tested with `make check` changelog: * v1: Initial revision * v2: Appease `check_GNU_style.py` * v3: Address review comments * v4: Drop unrelated `.editorconfig` changes which were included by mistake Changed files: - A: gcc/config/aarch64/aarch64-acle-builtins.h - A: gcc/config/aarch64/aarch64-neon-builtins-base.cc - A: gcc/config/aarch64/aarch64-neon-builtins-base.def - A: gcc/config/aarch64/aarch64-neon-builtins-base.h - A: gcc/config/aarch64/aarch64-neon-builtins-functions.h - A: gcc/config/aarch64/aarch64-neon-builtins-shapes.cc - A: gcc/config/aarch64/aarch64-neon-builtins-shapes.h - A: gcc/config/aarch64/aarch64-neon-builtins.cc - A: gcc/config/aarch64/aarch64-neon-builtins.def - A: gcc/config/aarch64/aarch64-neon-builtins.h - A: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_indices.c - A: gcc/testsuite/gcc.target/aarch64/neon/aarch64-neon.exp - A: gcc/testsuite/gcc.target/aarch64/neon/arm_neon_test.h - A: gcc/testsuite/gcc.target/aarch64/neon/vadd.c - A: gcc/testsuite/gcc.target/aarch64/neon/vand.c - A: gcc/testsuite/gcc.target/aarch64/neon/vbcax.c - A: gcc/testsuite/gcc.target/aarch64/neon/vbic.c - A: gcc/testsuite/gcc.target/aarch64/neon/vbsl.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcls.c - A: gcc/testsuite/gcc.target/aarch64/neon/vclz.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcnt.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcombine.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcopy_lane.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcreate.c - A: gcc/testsuite/gcc.target/aarch64/neon/vdup.c - A: gcc/testsuite/gcc.target/aarch64/neon/vdup_lane.c - A: gcc/testsuite/gcc.target/aarch64/neon/veor.c - A: gcc/testsuite/gcc.target/aarch64/neon/veor3.c - A: gcc/testsuite/gcc.target/aarch64/neon/vext.c - A: gcc/testsuite/gcc.target/aarch64/neon/vget_high.c - A: gcc/testsuite/gcc.target/aarch64/neon/vget_lane.c - A: gcc/testsuite/gcc.target/aarch64/neon/vget_low.c - A: gcc/testsuite/gcc.target/aarch64/neon/vmov_n.c - A: gcc/testsuite/gcc.target/aarch64/neon/vmvn.c - A: gcc/testsuite/gcc.target/aarch64/neon/vorn.c - A: gcc/testsuite/gcc.target/aarch64/neon/vorr.c - A: gcc/testsuite/gcc.target/aarch64/neon/vrax1.c - A: gcc/testsuite/gcc.target/aarch64/neon/vrbit.c - A: gcc/testsuite/gcc.target/aarch64/neon/vreinterpret.c - A: gcc/testsuite/gcc.target/aarch64/neon/vrev.c - A: gcc/testsuite/gcc.target/aarch64/neon/vset_lane.c - A: gcc/testsuite/gcc.target/aarch64/neon/vtrn.c - A: gcc/testsuite/gcc.target/aarch64/neon/vuzp.c - A: gcc/testsuite/gcc.target/aarch64/neon/vxar.c - A: gcc/testsuite/gcc.target/aarch64/neon/vzip.c - A: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_indices.c - D: gcc/config/aarch64/aarch64-sve-builtins.h - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u8_indices_1.c - M: gcc/config.gcc - M: gcc/config/aarch64/aarch64-builtins.cc - M: gcc/config/aarch64/aarch64-builtins.h - M: gcc/config/aarch64/aarch64-c.cc - M: gcc/config/aarch64/aarch64-protos.h - M: gcc/config/aarch64/aarch64-simd-builtins.def - M: gcc/config/aarch64/aarch64-simd-pragma-builtins.def - M: gcc/config/aarch64/aarch64-simd.md - M: gcc/config/aarch64/aarch64-sve-builtins-base.cc - M: gcc/config/aarch64/aarch64-sve-builtins-base.h - M: gcc/config/aarch64/aarch64-sve-builtins-functions.h - M: gcc/config/aarch64/aarch64-sve-builtins-shapes.cc - M: gcc/config/aarch64/aarch64-sve-builtins-shapes.h - M: gcc/config/aarch64/aarch64-sve-builtins-sme.cc - M: gcc/config/aarch64/aarch64-sve-builtins-sme.h - M: gcc/config/aarch64/aarch64-sve-builtins-sve2.cc - M: gcc/config/aarch64/aarch64-sve-builtins-sve2.h - M: gcc/config/aarch64/aarch64-sve-builtins.cc - M: gcc/config/aarch64/aarch64-sve-builtins.def - M: gcc/config/aarch64/aarch64.cc - M: gcc/config/aarch64/aarch64.md - M: gcc/config/aarch64/arm_neon.h - M: gcc/config/aarch64/iterators.md - M: gcc/config/aarch64/t-aarch64 - M: gcc/testsuite/g++.target/aarch64/lane-bound-1.C - M: gcc/testsuite/g++.target/aarch64/pr103147-6.C - M: gcc/testsuite/g++.target/aarch64/pr117048.C - M: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c - M: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c - M: gcc/testsuite/gcc.target/aarch64/lane-bound-3.c - M: gcc/testsuite/gcc.target/aarch64/pr103147-6.c - M: gcc/testsuite/gcc.target/aarch64/pr113573.c - M: gcc/testsuite/gcc.target/aarch64/sha3_1.c - M: gcc/testsuite/gcc.target/aarch64/sha3_2.c - M: gcc/testsuite/gcc.target/aarch64/sha3_3.c - M: gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_6.c - M: gcc/testsuite/gcc.target/aarch64/simd/mf8_data_2.c - M: gcc/testsuite/gcc.target/aarch64/simd/vset_lane_s16_const_1.c - M: gcc/testsuite/gcc.target/aarch64/sme/inlining_10.c - M: gcc/testsuite/gcc.target/aarch64/sme/inlining_11.c - M: gcc/testsuite/gcc.target/aarch64/target_attr_10.c - M: gcc/testsuite/gcc.target/aarch64/vmov_n_1.c Karl Meakin (6): aarch64: Rename `aarch64-sve-builtins.h` to `aarch64-acle-builtins.h` aarch64: Port NEON add intrinsics to pragma-based framework aarch64: Port NEON vector manipulation intrinsics to pragma-based framework aarch64: Port NEON bit manipulation intrinsics to pragma-based framework aarch64: Port NEON permutation intrinsics to pragma-based framework aarch64: Port NEON reinterpret intrinsics to pragma-based framework gcc/config.gcc | 45 +- ...sve-builtins.h => aarch64-acle-builtins.h} | 1000 +- gcc/config/aarch64/aarch64-builtins.cc | 548 +- gcc/config/aarch64/aarch64-builtins.h | 1 + gcc/config/aarch64/aarch64-c.cc | 17 +- .../aarch64/aarch64-neon-builtins-base.cc | 773 + .../aarch64/aarch64-neon-builtins-base.def | 147 + .../aarch64/aarch64-neon-builtins-base.h | 29 + .../aarch64/aarch64-neon-builtins-functions.h | 29 + .../aarch64/aarch64-neon-builtins-shapes.cc | 132 + .../aarch64/aarch64-neon-builtins-shapes.h | 29 + gcc/config/aarch64/aarch64-neon-builtins.cc | 86 + gcc/config/aarch64/aarch64-neon-builtins.def | 40 + gcc/config/aarch64/aarch64-neon-builtins.h | 28 + gcc/config/aarch64/aarch64-protos.h | 4 +- gcc/config/aarch64/aarch64-simd-builtins.def | 36 - .../aarch64/aarch64-simd-pragma-builtins.def | 105 - gcc/config/aarch64/aarch64-simd.md | 13 +- .../aarch64/aarch64-sve-builtins-base.cc | 16 +- .../aarch64/aarch64-sve-builtins-base.h | 2 +- .../aarch64/aarch64-sve-builtins-functions.h | 2 +- .../aarch64/aarch64-sve-builtins-shapes.cc | 47 +- .../aarch64/aarch64-sve-builtins-shapes.h | 2 +- .../aarch64/aarch64-sve-builtins-sme.cc | 8 +- gcc/config/aarch64/aarch64-sve-builtins-sme.h | 2 +- .../aarch64/aarch64-sve-builtins-sve2.cc | 8 +- .../aarch64/aarch64-sve-builtins-sve2.h | 2 +- gcc/config/aarch64/aarch64-sve-builtins.cc | 917 +- gcc/config/aarch64/aarch64-sve-builtins.def | 11 + gcc/config/aarch64/aarch64.cc | 40 +- gcc/config/aarch64/aarch64.md | 6 - gcc/config/aarch64/arm_neon.h | 22960 ++++++---------- gcc/config/aarch64/iterators.md | 2 +- gcc/config/aarch64/t-aarch64 | 56 +- .../g++.target/aarch64/lane-bound-1.C | 2 +- gcc/testsuite/g++.target/aarch64/pr103147-6.C | 1 + gcc/testsuite/g++.target/aarch64/pr117048.C | 2 +- .../aarch64/advsimd-intrinsics/bf16_dup.c | 7 +- .../bf16_vect_copy_lane_1.c | 3 +- .../vcopy_lane_bf16_indices_1.c | 18 - .../vcopy_lane_bf16_indices_2.c | 18 - .../advsimd-intrinsics/vcopy_lane_indices.c | 68 + .../vcopy_laneq_bf16_indices_1.c | 17 - .../vcopy_laneq_bf16_indices_2.c | 17 - .../vcopyq_lane_bf16_indices_1.c | 17 - .../vcopyq_lane_bf16_indices_2.c | 17 - .../vcopyq_laneq_bf16_indices_1.c | 17 - .../vcopyq_laneq_bf16_indices_2.c | 17 - .../gcc.target/aarch64/lane-bound-3.c | 4 +- .../gcc.target/aarch64/neon/aarch64-neon.exp | 39 + .../gcc.target/aarch64/neon/arm_neon_test.h | 24 + gcc/testsuite/gcc.target/aarch64/neon/vadd.c | 203 + gcc/testsuite/gcc.target/aarch64/neon/vand.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/vbcax.c | 60 + gcc/testsuite/gcc.target/aarch64/neon/vbic.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/vbsl.c | 214 + gcc/testsuite/gcc.target/aarch64/neon/vcls.c | 88 + gcc/testsuite/gcc.target/aarch64/neon/vclz.c | 88 + gcc/testsuite/gcc.target/aarch64/neon/vcnt.c | 25 + .../gcc.target/aarch64/neon/vcombine.c | 120 + .../gcc.target/aarch64/neon/vcopy_lane.c | 428 + .../gcc.target/aarch64/neon/vcreate.c | 119 + gcc/testsuite/gcc.target/aarch64/neon/vdup.c | 226 + .../gcc.target/aarch64/neon/vdup_lane.c | 647 + gcc/testsuite/gcc.target/aarch64/neon/veor.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/veor3.c | 60 + gcc/testsuite/gcc.target/aarch64/neon/vext.c | 216 + .../gcc.target/aarch64/neon/vget_high.c | 116 + .../gcc.target/aarch64/neon/vget_lane.c | 232 + .../gcc.target/aarch64/neon/vget_low.c | 100 + .../gcc.target/aarch64/neon/vmov_n.c | 212 + gcc/testsuite/gcc.target/aarch64/neon/vmvn.c | 102 + gcc/testsuite/gcc.target/aarch64/neon/vorn.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/vorr.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/vrax1.c | 11 + gcc/testsuite/gcc.target/aarch64/neon/vrbit.c | 46 + .../gcc.target/aarch64/neon/vreinterpret.c | 3143 +++ gcc/testsuite/gcc.target/aarch64/neon/vrev.c | 311 + .../gcc.target/aarch64/neon/vset_lane.c | 234 + gcc/testsuite/gcc.target/aarch64/neon/vtrn.c | 566 + gcc/testsuite/gcc.target/aarch64/neon/vuzp.c | 566 + gcc/testsuite/gcc.target/aarch64/neon/vxar.c | 25 + gcc/testsuite/gcc.target/aarch64/neon/vzip.c | 559 + gcc/testsuite/gcc.target/aarch64/pr103147-6.c | 1 + gcc/testsuite/gcc.target/aarch64/pr113573.c | 62 +- gcc/testsuite/gcc.target/aarch64/sha3_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sha3_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sha3_3.c | 2 +- .../aarch64/simd/fold_to_highpart_6.c | 24 +- .../gcc.target/aarch64/simd/mf8_data_2.c | 1 - .../aarch64/simd/vget_lane_f32_indices_1.c | 17 - .../aarch64/simd/vget_lane_f64_indices_1.c | 17 - .../aarch64/simd/vget_lane_indices.c | 46 + .../aarch64/simd/vget_lane_p16_indices_1.c | 17 - .../aarch64/simd/vget_lane_p8_indices_1.c | 17 - .../aarch64/simd/vget_lane_s16_indices_1.c | 17 - .../aarch64/simd/vget_lane_s32_indices_1.c | 17 - .../aarch64/simd/vget_lane_s64_indices_1.c | 17 - .../aarch64/simd/vget_lane_s8_indices_1.c | 17 - .../aarch64/simd/vget_lane_u16_indices_1.c | 17 - .../aarch64/simd/vget_lane_u32_indices_1.c | 17 - .../aarch64/simd/vget_lane_u64_indices_1.c | 17 - .../aarch64/simd/vget_lane_u8_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_f32_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_f64_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_p16_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_p8_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_s16_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_s32_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_s64_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_s8_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_u16_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_u32_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_u64_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_u8_indices_1.c | 17 - .../aarch64/simd/vset_lane_s16_const_1.c | 2 +- .../gcc.target/aarch64/sme/inlining_10.c | 6 +- .../gcc.target/aarch64/sme/inlining_11.c | 7 +- .../gcc.target/aarch64/target_attr_10.c | 4 +- gcc/testsuite/gcc.target/aarch64/vmov_n_1.c | 2 +- 120 files changed, 20499 insertions(+), 16798 deletions(-) rename gcc/config/aarch64/{aarch64-sve-builtins.h => aarch64-acle-builtins.h} (59%) create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-base.cc create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-base.def create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-base.h create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-functions.h create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-shapes.cc create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-shapes.h create mode 100644 gcc/config/aarch64/aarch64-neon-builtins.cc create mode 100644 gcc/config/aarch64/aarch64-neon-builtins.def create mode 100644 gcc/config/aarch64/aarch64-neon-builtins.h delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_indices.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/aarch64-neon.exp create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/arm_neon_test.h create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vadd.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vand.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vbcax.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vbic.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vbsl.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcls.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vclz.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcnt.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcombine.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcopy_lane.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcreate.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vdup.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vdup_lane.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/veor.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/veor3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vext.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vget_high.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vget_lane.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vget_low.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vmov_n.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vmvn.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vorn.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vorr.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrax1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrbit.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vreinterpret.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrev.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vset_lane.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vtrn.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vuzp.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vxar.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vzip.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f64_indices_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_indices.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u8_indices_1.c Range-diff against v2: 1: d21069d5c995 < -: ------------ Configure EditorConfig for Git commit messages 2: 705915ba6df5 ! 1: 5ae3b32ce668 aarch64: Rename `aarch64-sve-builtins.h` to `aarch64-acle-builtins.h` @@ Commit message gcc/ChangeLog: - * config.gcc (target_gtfiles): Rename `aarch64-sve-builtins.h` to `aarch64-acle-builtins.h` - and split the list over several lines for readability. - * config/aarch64/t-aarch64: Rename `aarch64-sve-builtins.h` to `aarch64-acle-builtins.h`. + * config.gcc (target_gtfiles): Rename `aarch64-sve-builtins.h` + to `aarch64-acle-builtins.h` and split the list over several + lines for readability. + * config/aarch64/t-aarch64: Rename `aarch64-sve-builtins.h` to + `aarch64-acle-builtins.h`. * config/aarch64/aarch64-sve-builtins.h: Move to... * config/aarch64/aarch64-acle-builtins.h: ...here. - * config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64): Rename namespace `aarch64_sve` to - `aarch64_acle`. + * config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64): Rename + namespace `aarch64_sve` to `aarch64_acle`. (aarch64_resolve_overloaded_builtin): Likewise. (aarch64_check_builtin_call): Likewise. * config/aarch64/aarch64-protos.h: Likewise. @@ gcc/config.gcc: aarch64*-*-*) d_target_objs="aarch64-d.o" - extra_objs="aarch64-builtins.o aarch-common.o aarch64-elf-metadata.o aarch64-sve-builtins.o aarch64-sve-builtins-shapes.o aarch64-sve-builtins-base.o aarch64-sve-builtins-sve2.o aarch64-sve-builtins-sme.o cortex-a57-fma-steering.o aarch64-speculation.o aarch-bti-insert.o aarch64-early-ra.o aarch64-ldp-fusion.o aarch64-sched-dispatch.o aarch64-json-tunings-printer.o aarch64-json-tunings-parser.o aarch64-narrow-gp-writes.o" - target_gtfiles="\$(srcdir)/config/aarch64/aarch64-protos.h \$(srcdir)/config/aarch64/aarch64-builtins.h \$(srcdir)/config/aarch64/aarch64-builtins.cc \$(srcdir)/config/aarch64/aarch64-sve-builtins.h \$(srcdir)/config/aarch64/aarch64-sve-builtins.cc" -+ extra_objs=( -+ 'aarch64-builtins.o' -+ 'aarch-common.o aarch64-elf-metadata.o' -+ 'aarch64-sve-builtins.o' -+ 'aarch64-sve-builtins-shapes.o' -+ 'aarch64-sve-builtins-base.o' -+ 'aarch64-sve-builtins-sve2.o' -+ 'aarch64-sve-builtins-sme.o' -+ 'cortex-a57-fma-steering.o' -+ 'aarch64-speculation.o' -+ 'aarch-bti-insert.o' -+ 'aarch64-early-ra.o' -+ 'aarch64-ldp-fusion.o' -+ 'aarch64-sched-dispatch.o' -+ 'aarch64-json-tunings-printer.o' -+ 'aarch64-json-tunings-parser.o' -+ 'aarch64-narrow-gp-writes.o' -+ ) -+ extra_objs="${extra_objs[@]}" -+ target_gtfiles=( -+ '$(srcdir)/config/aarch64/aarch64-protos.h' -+ '$(srcdir)/config/aarch64/aarch64-builtins.h' -+ '$(srcdir)/config/aarch64/aarch64-builtins.cc' -+ '$(srcdir)/config/aarch64/aarch64-acle-builtins.h' -+ '$(srcdir)/config/aarch64/aarch64-sve-builtins.cc' -+ ) -+ target_gtfiles="${target_gtfiles[@]}" ++ ++ extra_objs="${extra_objs} aarch64-builtins.o" ++ extra_objs="${extra_objs} aarch-common.o aarch64-elf-metadata.o" ++ extra_objs="${extra_objs} aarch64-sve-builtins.o" ++ extra_objs="${extra_objs} aarch64-sve-builtins-shapes.o" ++ extra_objs="${extra_objs} aarch64-sve-builtins-base.o" ++ extra_objs="${extra_objs} aarch64-sve-builtins-sve2.o" ++ extra_objs="${extra_objs} aarch64-sve-builtins-sme.o" ++ extra_objs="${extra_objs} cortex-a57-fma-steering.o" ++ extra_objs="${extra_objs} aarch64-speculation.o" ++ extra_objs="${extra_objs} aarch-bti-insert.o" ++ extra_objs="${extra_objs} aarch64-early-ra.o" ++ extra_objs="${extra_objs} aarch64-ldp-fusion.o" ++ extra_objs="${extra_objs} aarch64-sched-dispatch.o" ++ extra_objs="${extra_objs} aarch64-json-tunings-printer.o" ++ extra_objs="${extra_objs} aarch64-json-tunings-parser.o" ++ extra_objs="${extra_objs} aarch64-narrow-gp-writes.o" ++ ++ target_gtfiles="" ++ target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-protos.h" ++ target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-builtins.h" ++ target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-builtins.cc" ++ target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-acle-builtins.h" ++ target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-sve-builtins.cc" ++ target_has_targetm_common=yes ;; alpha*-*-*) 3: baab4a1afc5a ! 2: 565594883268 aarch64: Port NEON add intrinsics to pragma-based framework @@ Metadata ## Commit message ## aarch64: Port NEON add intrinsics to pragma-based framework - Add all the necessary infrastructure for defining NEON intrinsics using the pragma-based framework, - and port the `vadd` family of functions to demonstrate that it works. + Add all the necessary infrastructure for defining NEON intrinsics using + the pragma-based framework, and port the `vadd` family of functions to + demonstrate that it works. gcc/ChangeLog: @@ Commit message * config/aarch64/aarch64-neon-builtins.cc: New file. * config/aarch64/aarch64-neon-builtins.def: New file. * config/aarch64/aarch64-neon-builtins.h: New file. - * config.gcc (extra_headers, extra_objs): Add new files and reformat for readability. + * config.gcc (extra_headers, extra_objs): Add new files and + reformat for readability. * config/aarch64/t-aarch64: Add recipes for new files. - * config/aarch64/aarch64-protos.h (handle_arm_neon_h): Rename to `init_arm_neon_builtins`. + * config/aarch64/aarch64-protos.h (handle_arm_neon_h): Rename to + `init_arm_neon_builtins`. * config/aarch64/aarch64-builtins.cc (handle_arm_neon_h): Likewise. * config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64): Call `aarch64_acle::handle_arm_neon_h`. - * config/aarch64/aarch64-sve-builtins.cc (TYPES_*): Move to aarch64-acle-builtins.h + * config/aarch64/aarch64-sve-builtins.cc (TYPES_*): Move to + aarch64-acle-builtins.h (NONSTREAMING_SVE, SVE_AND_SME, SSVE): Likewise. - * config/aarch64/aarch64-sve-builtins-shapes.cc (build_all): Remove `static` qualifier. - (gimple_folder::fold): Allow folding when `TARGET_SVE` is false but `TARGET_SIMD` is true. - * config/aarch64/aarch64-sve-builtins.def (p8, p16, p64, 128): New type suffixes. - * config/aarch64/aarch64-acle-builtins.h (enum handle_pragma_index): New enum member - `arm_neon_handle`. + * config/aarch64/aarch64-sve-builtins-shapes.cc (build_all): + Remove `static` qualifier. + (gimple_folder::fold): Allow folding when `TARGET_SVE` is false + but `TARGET_SIMD` is true. + * config/aarch64/aarch64-sve-builtins.def (p8, p16, p64, 128): + New type suffixes. + * config/aarch64/aarch64-acle-builtins.h (enum + handle_pragma_index): New enum member `arm_neon_handle`. (enum type_class_index): New enum member `TYPE_poly`. - (build_all): New declaration, so it can be used from `aarch64-neon-builtins.cc`. + (build_all): New declaration, so it can be used from + `aarch64-neon-builtins.cc`. (TYPES_*): Moved from `aarch64-sve-builtins.cc`. (NONSTREAMING_SVE, SVE_AND_SME, SSVE): Likewise. - * config/aarch64/arm_neon.h (vadd_s8, vadd_s16, vadd_s32, vadd_f32, vadd_f64, vadd_u8, - vadd_u16, vadd_u32, vadd_s64, vadd_u64, vaddq_s8, vaddq_s16, vaddq_s32, vaddq_s64, - vaddq_f32, vaddq_f64, vaddq_u8, vaddq_u16, vaddq_u32, vaddq_u64, vadd_f16, vaddq_f16, - vadd_p8, vadd_p16, vadd_p64, vaddq_p8, vaddq_p16, vaddq_p64, vaddq_p128, vaddd_u64, + * config/aarch64/arm_neon.h (vadd_s8, vadd_s16, vadd_s32, + vadd_f32, vadd_f64, vadd_u8, vadd_u16, vadd_u32, vadd_s64, + vadd_u64, vaddq_s8, vaddq_s16, vaddq_s32, vaddq_s64, + vaddq_f32, vaddq_f64, vaddq_u8, vaddq_u16, vaddq_u32, + vaddq_u64, vadd_f16, vaddq_f16, vadd_p8, vadd_p16, vadd_p64, + vaddq_p8, vaddq_p16, vaddq_p64, vaddq_p128, vaddd_u64, vaddd_s64): Delete function definitions. gcc/testsuite/ChangeLog: @@ Commit message * gcc.target/aarch64/neon/vadd.c: New test. ## gcc/config.gcc ## -@@ - # the --with-sysroot configure option or the - # --sysroot command line option is used this - # will be relative to the sysroot. --# target_type_format_char -+# target_type_format_char - # The default character to be used for formatting - # the attribute in a - # .type symbol_name, ${t_t_f_c}<property> @@ gcc/config.gcc: cpu_is_64bit= case ${target} in aarch64*-*-*) cpu_type=aarch64 - extra_headers="arm_fp16.h arm_neon.h arm_bf16.h arm_acle.h arm_sve.h arm_sme.h arm_neon_sve_bridge.h arm_private_fp8.h arm_private_neon_types.h" -+ extra_headers=( -+ 'arm_fp16.h' -+ 'arm_neon.h' -+ 'arm_bf16.h' -+ 'arm_acle.h' -+ 'arm_sve.h' -+ 'arm_sme.h' -+ 'arm_neon_sve_bridge.h' -+ 'arm_private_fp8.h' -+ 'arm_private_neon_types.h' -+ ) -+ extra_headers="${extra_headers[@]}" ++ extra_headers="" ++ extra_headers="${extra_headers} arm_fp16.h" ++ extra_headers="${extra_headers} arm_neon.h" ++ extra_headers="${extra_headers} arm_bf16.h" ++ extra_headers="${extra_headers} arm_acle.h" ++ extra_headers="${extra_headers} arm_sve.h" ++ extra_headers="${extra_headers} arm_sme.h" ++ extra_headers="${extra_headers} arm_neon_sve_bridge.h" ++ extra_headers="${extra_headers} arm_private_fp8.h" ++ extra_headers="${extra_headers} arm_private_neon_types.h" ++ c_target_objs="aarch64-c.o" cxx_target_objs="aarch64-c.o" d_target_objs="aarch64-d.o" + ++ extra_objs="" + extra_objs="${extra_objs} aarch64-builtins.o" + extra_objs="${extra_objs} aarch-common.o aarch64-elf-metadata.o" + extra_objs="${extra_objs} aarch64-sve-builtins.o" @@ gcc/config.gcc: aarch64*-*-*) - 'aarch64-json-tunings-printer.o' - 'aarch64-json-tunings-parser.o' - 'aarch64-narrow-gp-writes.o' -+ 'aarch64-neon-builtins.o' -+ 'aarch64-neon-builtins-base.o' -+ 'aarch64-neon-builtins-shapes.o' - ) - extra_objs="${extra_objs[@]}" - target_gtfiles=( -@@ gcc/config.gcc: aarch64*-*-*) - '$(srcdir)/config/aarch64/aarch64-builtins.cc' - '$(srcdir)/config/aarch64/aarch64-acle-builtins.h' - '$(srcdir)/config/aarch64/aarch64-sve-builtins.cc' -+ '$(srcdir)/config/aarch64/aarch64-neon-builtins.cc' -+ '$(srcdir)/config/aarch64/aarch64-neon-builtins.h' - ) - target_gtfiles="${target_gtfiles[@]}" + extra_objs="${extra_objs} aarch64-json-tunings-printer.o" + extra_objs="${extra_objs} aarch64-json-tunings-parser.o" + extra_objs="${extra_objs} aarch64-narrow-gp-writes.o" ++ extra_objs="${extra_objs} aarch64-neon-builtins.o" ++ extra_objs="${extra_objs} aarch64-neon-builtins-base.o" ++ extra_objs="${extra_objs} aarch64-neon-builtins-shapes.o" + +- target_gtfiles="" ++ target_gtfiles="" + target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-protos.h" + target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-builtins.h" + target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-builtins.cc" + target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-acle-builtins.h" + target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-sve-builtins.cc" ++ target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-neon-builtins.cc" ++ target_gtfiles="${target_gtfiles} \$(srcdir)/config/aarch64/aarch64-neon-builtins.h" + target_has_targetm_common=yes + ;; ## gcc/config/aarch64/aarch64-acle-builtins.h ## @@ gcc/config/aarch64/aarch64-acle-builtins.h: enum units_index 4: 20ad24ee0eed ! 3: 3ad7d13d6860 aarch64: Port NEON vector manipulation intrinsics to pragma-based framework @@ Commit message gcc/ChangeLog: - * config/aarch64/aarch64-simd-builtins.def (combine): Delete function declarations. - * config/aarch64/aarch64-simd-pragma-builtins.def (vcombine_mf8, vcopy_lane_mf8, - vcopyq_lane_mf8, vcopy_laneq_mf8, vcopyq_laneq_mf8, vcreate_mf8, vdup_n_mf8, vdupq_n_mf8, - vdup_lane_mf8, vdupq_lane_mf8, vdup_laneq_mf8, vdupq_laneq_mf8, vmov_n_mf8, vmovq_n_mf8, - vset_lane_mf8, vsetq_lane_mf8): Delete entries. - * config/aarch64/aarch64-builtins.cc (AARCH64_SIMD_VGET_LOW_BUILTINS, - AARCH64_SIMD_VGET_HIGH_BUILTINS, VGET_LOW_BUILTIN, VGET_HIGH_BUILTIN): Delete macros. - (enum aarch64_builtins): Delete `AARCH64_SIMD_BUILTIN_LANE_CHECK`. - (aarch64_init_simd_builtin_functions): Delete code that registers - `__builtin_aarch64_im_lane_boundsi`. - (aarch64_pragma_builtins_checker::check): Delete cases for `UNSPEC_DUP_LANE`, - `UNSPEC_GET_LANE` and `UNSPEC_VEC_COPY`. - (aarch64_simd_expand_builtin): Delete case for `AARCH64_SIMD_BUILTIN_LANE_CHECK`. - (aarch64_expand_pragma_builtin): Delete cases for `UNSPEC_COMBINE`, `UNSPEC_DUP_LANE`, - `UNSPEC_VCREATE` and `UNSPEC_VEC_COPY`. - (aarch64_general_fold_builtin): Delete cases for `AARCH64_SIMD_VGET_LOW_BUILTINS`, - `AARCH64_SIMD_VGET_HIGH_BUILTINS` and `AARCH64_SIMD_BUILTIN_LANE_CHECK`. - (aarch64_fold_combine): Delete function. - (aarch64_gimple_fold_pragma_builtin): Delete cases for `UNSPEC_COMBINE`, `UNSPEC_DUP_LANE`, - `UNSPEC_VCREATE` and `UNSPEC_VEC_COPY`. - (aarch64_general_gimple_fold_builtin): Delete cases for `vcombine` and + * config/aarch64/aarch64-simd-builtins.def (combine): Delete + function declarations. + * config/aarch64/aarch64-simd-pragma-builtins.def (vcombine_mf8, + vcopy_lane_mf8, vcopyq_lane_mf8, vcopy_laneq_mf8, + vcopyq_laneq_mf8, vcreate_mf8, vdup_n_mf8, vdupq_n_mf8, + vdup_lane_mf8, vdupq_lane_mf8, vdup_laneq_mf8, + vdupq_laneq_mf8, vmov_n_mf8, vmovq_n_mf8, vset_lane_mf8, + vsetq_lane_mf8): Delete entries. + * config/aarch64/aarch64-builtins.cc + (AARCH64_SIMD_VGET_LOW_BUILTINS, + AARCH64_SIMD_VGET_HIGH_BUILTINS, VGET_LOW_BUILTIN, + VGET_HIGH_BUILTIN): Delete macros. + (enum aarch64_builtins): Delete + `AARCH64_SIMD_BUILTIN_LANE_CHECK`. + (aarch64_init_simd_builtin_functions): Delete code that + registers `__builtin_aarch64_im_lane_boundsi`. + (aarch64_pragma_builtins_checker::check): Delete cases for + `UNSPEC_DUP_LANE`, `UNSPEC_GET_LANE` and `UNSPEC_VEC_COPY`. + (aarch64_simd_expand_builtin): Delete case for + `AARCH64_SIMD_BUILTIN_LANE_CHECK`. + (aarch64_expand_pragma_builtin): Delete cases for + `UNSPEC_COMBINE`, `UNSPEC_DUP_LANE`, `UNSPEC_VCREATE` and + `UNSPEC_VEC_COPY`. + (aarch64_general_fold_builtin): Delete cases for + `AARCH64_SIMD_VGET_LOW_BUILTINS`, + `AARCH64_SIMD_VGET_HIGH_BUILTINS` and `AARCH64_SIMD_BUILTIN_LANE_CHECK`. - * config/aarch64/aarch64.md (UNSPEC_COMBINE, UNSPEC_DUP_LANE): Delete unspecs. - * config/aarch64/aarch64-neon-builtins-shapes.cc (range, lane): New functions. - (struct neon_shape): Add new fields for additional checks, and call them in `check()`. - * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::force_val, gimple_folder::assign): + (aarch64_fold_combine): Delete function. + (aarch64_gimple_fold_pragma_builtin): Delete cases for + `UNSPEC_COMBINE`, `UNSPEC_DUP_LANE`, `UNSPEC_VCREATE` and + `UNSPEC_VEC_COPY`. + (aarch64_general_gimple_fold_builtin): Delete cases for + `vcombine` and `AARCH64_SIMD_BUILTIN_LANE_CHECK`. + * config/aarch64/aarch64.md (UNSPEC_COMBINE, UNSPEC_DUP_LANE): + Delete unspecs. + * config/aarch64/aarch64-neon-builtins-shapes.cc (range, lane): New functions. - * config/aarch64/aarch64-acle-builtins.h (TYPES_all_neon, TYPES_bhsd_neon, - TYPES_neon_copy_lane): New type lists. + (struct neon_shape): Add new fields for additional checks, and + call them in `check()`. + * config/aarch64/aarch64-sve-builtins.cc + (gimple_folder::force_val, gimple_folder::assign): New + functions. + * config/aarch64/aarch64-acle-builtins.h (TYPES_all_neon, + TYPES_bhsd_neon, TYPES_neon_copy_lane): New type lists. * config/aarch64/iterators.md (VALL_F16_NO_V2Q): Add `V4BF` and `V8BF`. - * config/aarch64/aarch64-neon-builtins-base.def (vcreate, vcombine, vget_lane, vgetq_lane, - vget_high, vget_low, vset_lane, vsetq_lane, vdup_lane, vdupq_lane, vdup_laneq, - vdupq_laneq, vdup_n, vdupq_n, vmov_n, vmovq_n, vcopy_lane, vcopy_laneq, vcopyq_lane, - vcopyq_laneq): New function groups. - * config/aarch64/aarch64-neon-builtins-base.cc (build_lane_get, build_lane_set, - build_vec_dup): New functions. - (struct gimple_create, struct gimple_combine, struct gimple_get_lane, struct - gimple_get_half, struct gimple_set_lane, struct gimple_copy_lane, struct gimple_dup, struct + * config/aarch64/aarch64-neon-builtins-base.def (vcreate, + vcombine, vget_lane, vgetq_lane, vget_high, vget_low, + vset_lane, vsetq_lane, vdup_lane, vdupq_lane, vdup_laneq, + vdupq_laneq, vdup_n, vdupq_n, vmov_n, vmovq_n, vcopy_lane, + vcopy_laneq, vcopyq_lane, vcopyq_laneq): New function groups. + * config/aarch64/aarch64-neon-builtins-base.cc (build_lane_get, + build_lane_set, build_vec_dup): New functions. + (struct gimple_create, struct gimple_combine, struct + gimple_get_lane, struct gimple_get_half, struct gimple_set_lane, + struct gimple_copy_lane, struct gimple_dup, struct gimple_dup_lane): New structs. - (vcreate, vcombine, vget_lane, vgetq_lane, vset_lane, vsetq_lane, vcopy_lane, vcopyq_lane, - vcopy_laneq, vcopyq_laneq, vdup_n, vdupq_n, vmov_n, vmovq_n, vdup_lane, vdupq_lane, + (vcreate, vcombine, vget_lane, vgetq_lane, vset_lane, + vsetq_lane, vcopy_lane, vcopyq_lane, vcopy_laneq, vcopyq_laneq, + vdup_n, vdupq_n, vmov_n, vmovq_n, vdup_lane, vdupq_lane, vdupq_lane, vdupq_laneq): New function bases. - * config/aarch64/arm_neon.h (__aarch64_vdup_lane_p8, __aarch64_vdup_lane_p16, - __aarch64_vdup_lane_p64, __aarch64_vdup_lane_s8, __aarch64_vdup_lane_s16, - __aarch64_vdup_lane_s32, __aarch64_vdup_lane_s64, __aarch64_vdup_lane_u8, - __aarch64_vdup_lane_u16, __aarch64_vdup_lane_u32, __aarch64_vdup_lane_u64, - __aarch64_vdup_laneq_p8, __aarch64_vdup_laneq_p16, __aarch64_vdup_laneq_p64, - __aarch64_vdup_laneq_s8, __aarch64_vdup_laneq_s16, __aarch64_vdup_laneq_s32, - __aarch64_vdup_laneq_s64, __aarch64_vdup_laneq_u8, __aarch64_vdup_laneq_u16, - __aarch64_vdup_laneq_u32, __aarch64_vdup_laneq_u64, __aarch64_vdupq_lane_p8, - __aarch64_vdupq_lane_p16, __aarch64_vdupq_lane_p64, __aarch64_vdupq_lane_s8, - __aarch64_vdupq_lane_s16, __aarch64_vdupq_lane_s32, __aarch64_vdupq_lane_s64, - __aarch64_vdupq_lane_u8, __aarch64_vdupq_lane_u16, __aarch64_vdupq_lane_u32, - __aarch64_vdupq_lane_u64, __aarch64_vdupq_laneq_p8, __aarch64_vdupq_laneq_p16, - __aarch64_vdupq_laneq_p64, __aarch64_vdupq_laneq_s8, __aarch64_vdupq_laneq_s16, - __aarch64_vdupq_laneq_s32, __aarch64_vdupq_laneq_s64, __aarch64_vdupq_laneq_u8, - __aarch64_vdupq_laneq_u16, __aarch64_vdupq_laneq_u32, __aarch64_vdupq_laneq_u64, - __AARCH64_LANE_CHECK, __aarch64_vget_lane_any, __aarch64_vset_lane_any, vcreate_s8, - vcreate_s16, vcreate_s32, vcreate_s64, vcreate_f16, vcreate_f32, vcreate_u8, vcreate_u16, - vcreate_u32, vcreate_u64, vcreate_f64, vcreate_p8, vcreate_p16, vcreate_p64, - vget_lane_f16, vget_lane_f32, vget_lane_f64, vget_lane_p8, vget_lane_p16, vget_lane_p64, - vget_lane_s8, vget_lane_s16, vget_lane_s32, vget_lane_s64, vget_lane_u8, vget_lane_u16, - vget_lane_u32, vget_lane_u64, vgetq_lane_f16, vgetq_lane_f32, vgetq_lane_f64, - vgetq_lane_p8, vgetq_lane_p16, vgetq_lane_p64, vgetq_lane_s8, vgetq_lane_s16, - vgetq_lane_s32, vgetq_lane_s64, vgetq_lane_u8, vgetq_lane_u16, vgetq_lane_u32, - vgetq_lane_u64, vset_lane_f16, vset_lane_f32, vset_lane_f64, vset_lane_p8, vset_lane_p16, - vset_lane_p64, vset_lane_s8, vset_lane_s16, vset_lane_s32, vset_lane_s64, vset_lane_u8, - vset_lane_u16, vset_lane_u32, vset_lane_u64, vsetq_lane_f16, vsetq_lane_f32, - vsetq_lane_f64, vsetq_lane_p8, vsetq_lane_p16, vsetq_lane_p64, vsetq_lane_s8, - vsetq_lane_s16, vsetq_lane_s32, vsetq_lane_s64, vsetq_lane_u8, vsetq_lane_u16, - vsetq_lane_u32, vsetq_lane_u64, vcombine_s8, vcombine_s16, vcombine_s32, vcombine_s64, - vcombine_f16, vcombine_f32, vcombine_u8, vcombine_u16, vcombine_u32, vcombine_u64, - vcombine_f64, vcombine_p8, vcombine_p16, vcombine_p64, vcopy_lane_f32, vcopy_lane_f64, - vcopy_lane_p8, vcopy_lane_p16, vcopy_lane_p64, vcopy_lane_s8, vcopy_lane_s16, - vcopy_lane_s32, vcopy_lane_s64, vcopy_lane_u8, vcopy_lane_u16, vcopy_lane_u32, - vcopy_lane_u64, vcopy_laneq_f32, vcopy_laneq_f64, vcopy_laneq_p8, vcopy_laneq_p16, - vcopy_laneq_p64, vcopy_laneq_s8, vcopy_laneq_s16, vcopy_laneq_s32, vcopy_laneq_s64, - vcopy_laneq_u8, vcopy_laneq_u16, vcopy_laneq_u32, vcopy_laneq_u64, vcopyq_lane_f32, - vcopyq_lane_f64, vcopyq_lane_p8, vcopyq_lane_p16, vcopyq_lane_p64, vcopyq_lane_s8, - vcopyq_lane_s16, vcopyq_lane_s32, vcopyq_lane_s64, vcopyq_lane_u8, vcopyq_lane_u16, - vcopyq_lane_u32, vcopyq_lane_u64, vcopyq_laneq_f32, vcopyq_laneq_f64, vcopyq_laneq_p8, - vcopyq_laneq_p16, vcopyq_laneq_p64, vcopyq_laneq_s8, vcopyq_laneq_s16, vcopyq_laneq_s32, - vcopyq_laneq_s64, vcopyq_laneq_u8, vcopyq_laneq_u16, vcopyq_laneq_u32, vcopyq_laneq_u64, - vdup_n_f16, vdup_n_f32, vdup_n_f64, vdup_n_p8, vdup_n_p16, vdup_n_p64, vdup_n_s8, - vdup_n_s16, vdup_n_s32, vdup_n_s64, vdup_n_u8, vdup_n_u16, vdup_n_u32, vdup_n_u64, - vdupq_n_f16, vdupq_n_f32, vdupq_n_f64, vdupq_n_p8, vdupq_n_p16, vdupq_n_p64, vdupq_n_s8, - vdupq_n_s16, vdupq_n_s32, vdupq_n_s64, vdupq_n_u8, vdupq_n_u16, vdupq_n_u32, vdupq_n_u64, - vdup_lane_f16, vdup_lane_f32, vdup_lane_f64, vdup_lane_p8, vdup_lane_p16, vdup_lane_p64, - vdup_lane_s8, vdup_lane_s16, vdup_lane_s32, vdup_lane_s64, vdup_lane_u8, vdup_lane_u16, - vdup_lane_u32, vdup_lane_u64, vdup_laneq_f16, vdup_laneq_f32, vdup_laneq_f64, - vdup_laneq_p8, vdup_laneq_p16, vdup_laneq_p64, vdup_laneq_s8, vdup_laneq_s16, - vdup_laneq_s32, vdup_laneq_s64, vdup_laneq_u8, vdup_laneq_u16, vdup_laneq_u32, - vdup_laneq_u64, vdupq_lane_f16, vdupq_lane_f32, vdupq_lane_f64, vdupq_lane_p8, - vdupq_lane_p16, vdupq_lane_p64, vdupq_lane_s8, vdupq_lane_s16, vdupq_lane_s32, - vdupq_lane_s64, vdupq_lane_u8, vdupq_lane_u16, vdupq_lane_u32, vdupq_lane_u64, - vdupq_laneq_f16, vdupq_laneq_f32, vdupq_laneq_f64, vdupq_laneq_p8, vdupq_laneq_p16, - vdupq_laneq_p64, vdupq_laneq_s8, vdupq_laneq_s16, vdupq_laneq_s32, vdupq_laneq_s64, - vdupq_laneq_u8, vdupq_laneq_u16, vdupq_laneq_u32, vdupq_laneq_u64, vmov_n_f16, vmov_n_f32, - vmov_n_f64, vmov_n_p8, vmov_n_p16, vmov_n_p64, vmov_n_s8, vmov_n_s16, vmov_n_s32, - vmov_n_s64, vmov_n_u8, vmov_n_u16, vmov_n_u32, vmov_n_u64, vmovq_n_f16, vmovq_n_f32, - vmovq_n_f64, vmovq_n_p8, vmovq_n_p16, vmovq_n_p64, vmovq_n_s8, vmovq_n_s16, vmovq_n_s32, - vmovq_n_s64, vmovq_n_u8, vmovq_n_u16, vmovq_n_u32, vmovq_n_u64, vmulq_lane_f64, - vset_lane_bf16, vsetq_lane_bf16, vget_lane_bf16, vgetq_lane_bf16, vcreate_bf16, - vcombine_bf16, vdup_n_bf16, vdupq_n_bf16, vdup_lane_bf16, vdup_laneq_bf16, - vdupq_lane_bf16, vdupq_laneq_bf16, vcopy_lane_bf16, vcopyq_lane_bf16, vcopy_laneq_bf16, - vcopyq_laneq_bf16): Delete functions. + * config/aarch64/arm_neon.h (__aarch64_vdup_lane_p8, + __aarch64_vdup_lane_p16, __aarch64_vdup_lane_p64, + __aarch64_vdup_lane_s8, __aarch64_vdup_lane_s16, + __aarch64_vdup_lane_s32, __aarch64_vdup_lane_s64, + __aarch64_vdup_lane_u8, __aarch64_vdup_lane_u16, + __aarch64_vdup_lane_u32, __aarch64_vdup_lane_u64, + __aarch64_vdup_laneq_p8, __aarch64_vdup_laneq_p16, + __aarch64_vdup_laneq_p64, __aarch64_vdup_laneq_s8, + __aarch64_vdup_laneq_s16, __aarch64_vdup_laneq_s32, + __aarch64_vdup_laneq_s64, __aarch64_vdup_laneq_u8, + __aarch64_vdup_laneq_u16, __aarch64_vdup_laneq_u32, + __aarch64_vdup_laneq_u64, __aarch64_vdupq_lane_p8, + __aarch64_vdupq_lane_p16, __aarch64_vdupq_lane_p64, + __aarch64_vdupq_lane_s8, __aarch64_vdupq_lane_s16, + __aarch64_vdupq_lane_s32, __aarch64_vdupq_lane_s64, + __aarch64_vdupq_lane_u8, __aarch64_vdupq_lane_u16, + __aarch64_vdupq_lane_u32, __aarch64_vdupq_lane_u64, + __aarch64_vdupq_laneq_p8, __aarch64_vdupq_laneq_p16, + __aarch64_vdupq_laneq_p64, __aarch64_vdupq_laneq_s8, + __aarch64_vdupq_laneq_s16, __aarch64_vdupq_laneq_s32, + __aarch64_vdupq_laneq_s64, __aarch64_vdupq_laneq_u8, + __aarch64_vdupq_laneq_u16, __aarch64_vdupq_laneq_u32, + __aarch64_vdupq_laneq_u64, __AARCH64_LANE_CHECK, + __aarch64_vget_lane_any, __aarch64_vset_lane_any, vcreate_s8, + vcreate_s16, vcreate_s32, vcreate_s64, vcreate_f16, + vcreate_f32, vcreate_u8, vcreate_u16, vcreate_u32, + vcreate_u64, vcreate_f64, vcreate_p8, vcreate_p16, + vcreate_p64, vget_lane_f16, vget_lane_f32, vget_lane_f64, + vget_lane_p8, vget_lane_p16, vget_lane_p64, vget_lane_s8, + vget_lane_s16, vget_lane_s32, vget_lane_s64, vget_lane_u8, + vget_lane_u16, vget_lane_u32, vget_lane_u64, vgetq_lane_f16, + vgetq_lane_f32, vgetq_lane_f64, vgetq_lane_p8, vgetq_lane_p16, + vgetq_lane_p64, vgetq_lane_s8, vgetq_lane_s16, vgetq_lane_s32, + vgetq_lane_s64, vgetq_lane_u8, vgetq_lane_u16, vgetq_lane_u32, + vgetq_lane_u64, vset_lane_f16, vset_lane_f32, vset_lane_f64, + vset_lane_p8, vset_lane_p16, vset_lane_p64, vset_lane_s8, + vset_lane_s16, vset_lane_s32, vset_lane_s64, vset_lane_u8, + vset_lane_u16, vset_lane_u32, vset_lane_u64, vsetq_lane_f16, + vsetq_lane_f32, vsetq_lane_f64, vsetq_lane_p8, vsetq_lane_p16, + vsetq_lane_p64, vsetq_lane_s8, vsetq_lane_s16, vsetq_lane_s32, + vsetq_lane_s64, vsetq_lane_u8, vsetq_lane_u16, vsetq_lane_u32, + vsetq_lane_u64, vcombine_s8, vcombine_s16, vcombine_s32, + vcombine_s64, vcombine_f16, vcombine_f32, vcombine_u8, + vcombine_u16, vcombine_u32, vcombine_u64, vcombine_f64, + vcombine_p8, vcombine_p16, vcombine_p64, vcopy_lane_f32, + vcopy_lane_f64, vcopy_lane_p8, vcopy_lane_p16, vcopy_lane_p64, + vcopy_lane_s8, vcopy_lane_s16, vcopy_lane_s32, vcopy_lane_s64, + vcopy_lane_u8, vcopy_lane_u16, vcopy_lane_u32, vcopy_lane_u64, + vcopy_laneq_f32, vcopy_laneq_f64, vcopy_laneq_p8, + vcopy_laneq_p16, vcopy_laneq_p64, vcopy_laneq_s8, + vcopy_laneq_s16, vcopy_laneq_s32, vcopy_laneq_s64, + vcopy_laneq_u8, vcopy_laneq_u16, vcopy_laneq_u32, + vcopy_laneq_u64, vcopyq_lane_f32, vcopyq_lane_f64, + vcopyq_lane_p8, vcopyq_lane_p16, vcopyq_lane_p64, + vcopyq_lane_s8, vcopyq_lane_s16, vcopyq_lane_s32, + vcopyq_lane_s64, vcopyq_lane_u8, vcopyq_lane_u16, + vcopyq_lane_u32, vcopyq_lane_u64, vcopyq_laneq_f32, + vcopyq_laneq_f64, vcopyq_laneq_p8, vcopyq_laneq_p16, + vcopyq_laneq_p64, vcopyq_laneq_s8, vcopyq_laneq_s16, + vcopyq_laneq_s32, vcopyq_laneq_s64, vcopyq_laneq_u8, + vcopyq_laneq_u16, vcopyq_laneq_u32, vcopyq_laneq_u64, + vdup_n_f16, vdup_n_f32, vdup_n_f64, vdup_n_p8, vdup_n_p16, + vdup_n_p64, vdup_n_s8, vdup_n_s16, vdup_n_s32, vdup_n_s64, + vdup_n_u8, vdup_n_u16, vdup_n_u32, vdup_n_u64, vdupq_n_f16, + vdupq_n_f32, vdupq_n_f64, vdupq_n_p8, vdupq_n_p16, + vdupq_n_p64, vdupq_n_s8, vdupq_n_s16, vdupq_n_s32, + vdupq_n_s64, vdupq_n_u8, vdupq_n_u16, vdupq_n_u32, + vdupq_n_u64, vdup_lane_f16, vdup_lane_f32, vdup_lane_f64, + vdup_lane_p8, vdup_lane_p16, vdup_lane_p64, vdup_lane_s8, + vdup_lane_s16, vdup_lane_s32, vdup_lane_s64, vdup_lane_u8, + vdup_lane_u16, vdup_lane_u32, vdup_lane_u64, vdup_laneq_f16, + vdup_laneq_f32, vdup_laneq_f64, vdup_laneq_p8, vdup_laneq_p16, + vdup_laneq_p64, vdup_laneq_s8, vdup_laneq_s16, vdup_laneq_s32, + vdup_laneq_s64, vdup_laneq_u8, vdup_laneq_u16, vdup_laneq_u32, + vdup_laneq_u64, vdupq_lane_f16, vdupq_lane_f32, + vdupq_lane_f64, vdupq_lane_p8, vdupq_lane_p16, vdupq_lane_p64, + vdupq_lane_s8, vdupq_lane_s16, vdupq_lane_s32, vdupq_lane_s64, + vdupq_lane_u8, vdupq_lane_u16, vdupq_lane_u32, vdupq_lane_u64, + vdupq_laneq_f16, vdupq_laneq_f32, vdupq_laneq_f64, + vdupq_laneq_p8, vdupq_laneq_p16, vdupq_laneq_p64, + vdupq_laneq_s8, vdupq_laneq_s16, vdupq_laneq_s32, + vdupq_laneq_s64, vdupq_laneq_u8, vdupq_laneq_u16, + vdupq_laneq_u32, vdupq_laneq_u64, vmov_n_f16, vmov_n_f32, + vmov_n_f64, vmov_n_p8, vmov_n_p16, vmov_n_p64, vmov_n_s8, + vmov_n_s16, vmov_n_s32, vmov_n_s64, vmov_n_u8, vmov_n_u16, + vmov_n_u32, vmov_n_u64, vmovq_n_f16, vmovq_n_f32, vmovq_n_f64, + vmovq_n_p8, vmovq_n_p16, vmovq_n_p64, vmovq_n_s8, vmovq_n_s16, + vmovq_n_s32, vmovq_n_s64, vmovq_n_u8, vmovq_n_u16, + vmovq_n_u32, vmovq_n_u64, vmulq_lane_f64, vset_lane_bf16, + vsetq_lane_bf16, vget_lane_bf16, vgetq_lane_bf16, + vcreate_bf16, vcombine_bf16, vdup_n_bf16, vdupq_n_bf16, + vdup_lane_bf16, vdup_laneq_bf16, vdupq_lane_bf16, + vdupq_laneq_bf16, vcopy_lane_bf16, vcopyq_lane_bf16, + vcopy_laneq_bf16, vcopyq_laneq_bf16): Delete functions. gcc/testsuite/ChangeLog: @@ Commit message * gcc.target/aarch64/simd/fold_to_highpart_6.c: Fix test. * g++.target/aarch64/lane-bound-1.C: Fix test. * gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c: Fix test. - * gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c: Fix test. + * gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c: + Fix test. * gcc.target/aarch64/lane-bound-3.c: Fix test. * gcc.target/aarch64/pr113573.c: Fix test. * gcc.target/aarch64/simd/vset_lane_s16_const_1.c: Fix test. @@ gcc/testsuite/g++.target/aarch64/lane-bound-1.C: void hh(uint64x2_t c, int __b) removeme(); // { dg-bogus "declared with attribute error" } ## gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c ## -@@ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c: bfloat16x8_t test_vdupq_lane_bf16 (bfloat16x4_t a) +@@ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c: bfloat16x8_t vdupq_test (bfloat16_t a) + { + return vdupq_n_bf16 (a); + } ++/* { dg-final { scan-assembler-times "dup\\tv\[0-9\]+\.8h, v\[0-9\]+.h\\\[0\\\]" 1 } } */ + + bfloat16x8_t test_vdupq_lane_bf16 (bfloat16x4_t a) { return vdupq_lane_bf16 (a, 1); } -/* { dg-final { scan-assembler-times "dup\\tv\[0-9\]+\.8h, v\[0-9\]+.h\\\[0\\\]" 2 } } */ -+/* { dg-final { scan-assembler-times "dup\\tv\[0-9\]+\.8h, v\[0-9\]+.h\\\[0\\\]" 1 } } */ ++/* { dg-final { scan-assembler-times "dup\\tv\[0-9\]+\.8h, v\[0-9\]+.h\\\[1\\\]" 1 } } */ bfloat16_t test_vget_lane_bf16 (bfloat16x4_t a) { 5: bfe249e58171 ! 4: f1a04104e44f aarch64: Port NEON bit manipulation intrinsics to pragma-based framework @@ Commit message gcc/ChangeLog: * config/aarch64/aarch64.md (UNSPEC_BSL): Delete unspec. - * config/aarch64/aarch64-simd-pragma-builtins.def (vbsl_mf8, vbslq_mf8): Delete functions. - * config/aarch64/aarch64-neon-builtins-base.cc (build_cast): New function. - (class gimple_not_rhs, class gimple_bsl, class gimple_rbit, class gimple_eor3, class - gimple_bcax, class gimple_rax1, class gimple_xar, class gimple_ifn): New classes. - (vand, vandq, vbic, vbicq, vbsl, vbslq, veor, veorq, vmvn, vmvnq, vorn, vornq, vorr, vorrq, - vrbit, vrbitq, vbcaxq, veor3q, vrax1q, vxarq, vcls, vclsq, vclz, vclzq, vcnt, vcntq): New + * config/aarch64/aarch64-simd-pragma-builtins.def (vbsl_mf8, + vbslq_mf8): Delete functions. + * config/aarch64/aarch64-neon-builtins-base.cc (build_cast): New + function. + (class gimple_not_rhs, class gimple_bsl, class gimple_rbit, + class gimple_eor3, class gimple_bcax, class gimple_rax1, class + gimple_xar, class gimple_ifn): New classes. + (vand, vandq, vbic, vbicq, vbsl, vbslq, veor, veorq, vmvn, + vmvnq, vorn, vornq, vorr, vorrq, vrbit, vrbitq, vbcaxq, veor3q, + vrax1q, vxarq, vcls, vclsq, vclz, vclzq, vcnt, vcntq): New function bases. * config/aarch64/aarch64-neon-builtins-shapes.cc (shift): New function. - * config/aarch64/aarch64-builtins.cc (aarch64_types_bsl_p_qualifiers, - aarch64_types_bsl_s_qualifiers, aarch64_types_bsl_u_qualifiers): Delete unused qualifiers. - * config/aarch64/aarch64-simd.md (@aarch64_rbit<mode><vczle><vczbe>): Add `@` modifier so - that it is callable from `aarch64-neon-builtins-base.cc`. - * config/aarch64/aarch64-acle-builtins.h (TYPES_b_neon, TYPES_b_poly): New type lists. - * config/aarch64/aarch64-neon-builtins-base.def (vand, vandq, vbic, vbicq, vbsl, vbslq, - veor, veorq, vmvn, vmvnq, vorn, vornq, vorr, vorrq, vrbit, vrbitq, vbcaxq, veor3q, vrax1q, - vxarq, vcls, vclsq, vclz, vclzq, vcnt, vcntq): New function groups. - * config/aarch64/aarch64-simd-builtins.def (clrsb, clz, ctz, popcount, rbit, simd_bsl): - Delete builtin functions. - * config/aarch64/arm_neon.h (vbsl_f16, vbsl_f32, vbsl_f64, vbsl_p8, vbsl_p16, vbsl_p64, - vbsl_s8, vbsl_s16, vbsl_s32, vbsl_s64, vbsl_u8, vbsl_u16, vbsl_u32, vbsl_u64, vbslq_f16, - vbslq_f32, vbslq_f64, vbslq_p8, vbslq_p16, vbslq_s8, vbslq_s16, vbslq_p64, vbslq_s32, - vbslq_s64, vbslq_u8, vbslq_u16, vbslq_u32, vbslq_u64, vcls_s8, vcls_s16, vcls_s32, - vclsq_s8, vclsq_s16, vclsq_s32, vcls_u8, vcls_u16, vcls_u32, vclsq_u8, vclsq_u16, - vclsq_u32, vclz_s8, vclz_s16, vclz_s32, vclz_u8, vclz_u16, vclz_u32, vclzq_s8, vclzq_s16, - vclzq_s32, vclzq_u8, vclzq_u16, vclzq_u32, vcnt_p8, vcnt_s8, vcnt_u8, vcntq_p8, vcntq_s8, - vcntq_u8, vrbit_p8, vrbit_s8, vrbit_u8, vrbitq_p8, vrbitq_s8, vrbitq_u8, veor3q_u8, - veor3q_u16, veor3q_u32, veor3q_u64, veor3q_s8, veor3q_s16, veor3q_s32, veor3q_s64, - vrax1q_u64, vxarq_u64, vbcaxq_u8, vbcaxq_u16, vbcaxq_u32, vbcaxq_u64, vbcaxq_s8, - vbcaxq_s16, vbcaxq_s32, vbcaxq_s64): Delete functions. + * config/aarch64/aarch64-builtins.cc + (aarch64_types_bsl_p_qualifiers, + aarch64_types_bsl_s_qualifiers, + aarch64_types_bsl_u_qualifiers): Delete unused qualifiers. + * config/aarch64/aarch64-simd.md + (@aarch64_rbit<mode><vczle><vczbe>): Add `@` modifier so that + it is callable from `aarch64-neon-builtins-base.cc`. + * config/aarch64/aarch64-acle-builtins.h (TYPES_b_neon, + TYPES_b_poly): New type lists. + * config/aarch64/aarch64-neon-builtins-base.def (vand, vandq, + vbic, vbicq, vbsl, vbslq, veor, veorq, vmvn, vmvnq, vorn, + vornq, vorr, vorrq, vrbit, vrbitq, vbcaxq, veor3q, vrax1q, + vxarq, vcls, vclsq, vclz, vclzq, vcnt, vcntq): New function + groups. + * config/aarch64/aarch64-simd-builtins.def (clrsb, clz, ctz, + popcount, rbit, simd_bsl): Delete builtin functions. + * config/aarch64/arm_neon.h (vbsl_f16, vbsl_f32, vbsl_f64, + vbsl_p8, vbsl_p16, vbsl_p64, vbsl_s8, vbsl_s16, vbsl_s32, + vbsl_s64, vbsl_u8, vbsl_u16, vbsl_u32, vbsl_u64, vbslq_f16, + vbslq_f32, vbslq_f64, vbslq_p8, vbslq_p16, vbslq_s8, + vbslq_s16, vbslq_p64, vbslq_s32, vbslq_s64, vbslq_u8, + vbslq_u16, vbslq_u32, vbslq_u64, vcls_s8, vcls_s16, vcls_s32, + vclsq_s8, vclsq_s16, vclsq_s32, vcls_u8, vcls_u16, vcls_u32, + vclsq_u8, vclsq_u16, vclsq_u32, vclz_s8, vclz_s16, vclz_s32, + vclz_u8, vclz_u16, vclz_u32, vclzq_s8, vclzq_s16, vclzq_s32, + vclzq_u8, vclzq_u16, vclzq_u32, vcnt_p8, vcnt_s8, vcnt_u8, + vcntq_p8, vcntq_s8, vcntq_u8, vrbit_p8, vrbit_s8, vrbit_u8, + vrbitq_p8, vrbitq_s8, vrbitq_u8, veor3q_u8, veor3q_u16, + veor3q_u32, veor3q_u64, veor3q_s8, veor3q_s16, veor3q_s32, + veor3q_s64, vrax1q_u64, vxarq_u64, vbcaxq_u8, vbcaxq_u16, + vbcaxq_u32, vbcaxq_u64, vbcaxq_s8, vbcaxq_s16, vbcaxq_s32, + vbcaxq_s64): Delete functions. gcc/testsuite/ChangeLog: @@ Commit message * gcc.target/aarch64/neon/vrax1.c: New test. * gcc.target/aarch64/neon/vrbit.c: New test. * gcc.target/aarch64/neon/vxar.c: New test. - * gcc.target/aarch64/sme/inlining_10.c: Delete `call_vbsl` since the intrinsic is no longer - implemented as an `always_inline` function. + * gcc.target/aarch64/sme/inlining_10.c: Delete `call_vbsl` since + the intrinsic is no longer implemented as an `always_inline` + function. * gcc.target/aarch64/sme/inlining_11.c: Likewise. - * gcc.target/aarch64/sha3_1.c, gcc.target/aarch64/sha3_2.c, gcc.target/aarch64/sha3_3.c: Add - `-O1` flag to ensure expected optimized assembly is emitted. + * gcc.target/aarch64/sha3_1.c, + gcc.target/aarch64/sha3_2.c, + gcc.target/aarch64/sha3_3.c: Now produces worse assembly at + `-O0`. Add `-O1` flag to ensure expected optimized assembly is + emitted. * gcc.target/aarch64/target_attr_10.c: Fix expected error message. ## gcc/config/aarch64/aarch64-acle-builtins.h ## @@ gcc/config/aarch64/aarch64-neon-builtins-base.cc: struct gimple_dup_lane : publi + } +}; + -+/* BSL (a, b, c) == (a & (b ^ c)) ^ c. */ ++/* BSL (d, n, m) == m ^ ((m ^ n) & d). */ +class gimple_bsl : public gimple_function_base +{ +public: + gimple *fold (gimple_folder &f) const override + { -+ auto a = gimple_call_arg (f.call, 0); -+ auto b = gimple_call_arg (f.call, 1); -+ auto c = gimple_call_arg (f.call, 2); ++ auto d = gimple_call_arg (f.call, 0); ++ auto n = gimple_call_arg (f.call, 1); ++ auto m = gimple_call_arg (f.call, 2); + -+ auto uint_type = TREE_TYPE (a); ++ auto uint_type = TREE_TYPE (d); + auto ret_type = TREE_TYPE (f.lhs); + -+ b = f.force_val (build_cast (uint_type, b)); -+ c = f.force_val (build_cast (uint_type, c)); ++ // Cast to unsigned integer type if necessary. ++ m = f.force_val (build_cast (uint_type, m)); ++ n = f.force_val (build_cast (uint_type, n)); + -+ // tmp1 = b ^ c -+ auto tmp1 = f.force_val (fold_build2 (BIT_XOR_EXPR, uint_type, b, c)); ++ // tmp1 = m ^ n ++ auto tmp1 = f.force_val (fold_build2 (BIT_XOR_EXPR, uint_type, m, n)); + -+ // tmp2 = a & (b ^ c) -+ auto tmp2 = f.force_val (fold_build2 (BIT_AND_EXPR, uint_type, a, tmp1)); ++ // tmp2 = (m ^ n) & d ++ auto tmp2 = f.force_val (fold_build2 (BIT_AND_EXPR, uint_type, tmp1, d)); + -+ // tmp3 = (a & (b ^ c)) ^ c -+ auto tmp3 = f.force_val (fold_build2 (BIT_XOR_EXPR, uint_type, tmp2, c)); ++ // tmp3 = m ^ ((m ^ n) & d) ++ auto tmp3 = f.force_val (fold_build2 (BIT_XOR_EXPR, uint_type, m, tmp2)); + + return gimple_build_assign (f.lhs, build_cast (ret_type, tmp3)); + } @@ gcc/testsuite/gcc.target/aarch64/sme/inlining_10.c: call_vadd () -inline void __attribute__((always_inline)) -call_vbsl () // { dg-error "inlining failed" } --{ -- neon[0] = vbslq_u8 (neon[1], neon[2], neon[3]); --} -- - inline void __attribute__((always_inline)) - call_svadd () - { -@@ gcc/testsuite/gcc.target/aarch64/sme/inlining_10.c: void - sc_caller () [[arm::inout("za"), arm::streaming_compatible]] ++// Gets expanded to bitwise select early, so no error. An error would be ++// more correct though. ++inline void __attribute__ ((always_inline)) ++call_vbsl () { - call_vadd (); -- call_vbsl (); - call_svadd (); - call_svld1_gather (); - call_svzero (); + neon[0] = vbslq_u8 (neon[1], neon[2], neon[3]); + } ## gcc/testsuite/gcc.target/aarch64/sme/inlining_11.c ## @@ gcc/testsuite/gcc.target/aarch64/sme/inlining_11.c: call_vadd () @@ gcc/testsuite/gcc.target/aarch64/sme/inlining_11.c: call_vadd () -inline void __attribute__((always_inline)) -call_vbsl () // { dg-error "inlining failed" } --{ -- neon[0] = vbslq_u8 (neon[1], neon[2], neon[3]); --} -- - inline void __attribute__((always_inline)) - call_svadd () ++// Gets expanded to bitwise select early, so no error. An error would be ++// more correct though. ++inline void __attribute__ ((always_inline)) ++call_vbsl () { + neon[0] = vbslq_u8 (neon[1], neon[2], neon[3]); + } @@ gcc/testsuite/gcc.target/aarch64/sme/inlining_11.c: void sc_caller () [[arm::inout("za"), arm::streaming]] { 6: b80d5a8e65dc ! 5: 008c775c9ef8 aarch64: Port NEON permutation intrinsics to pragma-based framework @@ Commit message gcc/ChangeLog: - * config/aarch64/aarch64-simd-pragma-builtins.def (vext_mf8, vextq_mf8, vrev64_mf8, - vrev64q_mf8, vrev32_mf8, vrev32q_mf8, vrev16_mf8, vrev16q_mf8, vtrn1_mf8, vtrn1q_mf8, - vtrn2_mf8, vtrn2q_mf8, vtrn_mf8, vtrnq_mf8, vuzp1_mf8, vuzp1q_mf8, vuzp2_mf8, vuzp2q_mf8, - vuzp_mf8, vuzpq_mf8, vzip1_mf8, vzip1q_mf8, vzip2_mf8, vzip2q_mf8, vzip_mf8, vzipq_mf8): + * config/aarch64/aarch64-simd-pragma-builtins.def (vext_mf8, + vextq_mf8, vrev64_mf8, vrev64q_mf8, vrev32_mf8, vrev32q_mf8, + vrev16_mf8, vrev16q_mf8, vtrn1_mf8, vtrn1q_mf8, vtrn2_mf8, + vtrn2q_mf8, vtrn_mf8, vtrnq_mf8, vuzp1_mf8, vuzp1q_mf8, + vuzp2_mf8, vuzp2q_mf8, vuzp_mf8, vuzpq_mf8, vzip1_mf8, + vzip1q_mf8, vzip2_mf8, vzip2q_mf8, vzip_mf8, vzipq_mf8): Delete functions. - * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_type): Handle `D` or `Q` followed by - `x1,x2,x3,x4` to mean tuple types. - * config/aarch64/aarch64-acle-builtins.h (TYPES_bh_poly, TYPES_bhs_neon, TYPES_neon_rev16, - TYPES_neon_rev32, TYPES_neon_rev64): New type lists. - (bh_poly, bhs_neon, neon_rev16, neon_rev32, neon_rev64): Likewise. - * config/aarch64/aarch64-builtins.cc (aarch64_simd_tuple_types): Remove `static` qualifier. - * config/aarch64/aarch64-builtins.h (aarch64_simd_tuple_types): New declaration. - * config/aarch64/aarch64-neon-builtins-base.cc (build_tuple_get, build_tuple_set): New - functions. + * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_type): + Handle `D` or `Q` followed by `x1,x2,x3,x4` to mean tuple + types. + * config/aarch64/aarch64-acle-builtins.h (TYPES_bh_poly, + TYPES_bhs_neon, TYPES_neon_rev16, TYPES_neon_rev32, + TYPES_neon_rev64): New type lists. + (bh_poly, bhs_neon, neon_rev16, neon_rev32, neon_rev64): + Likewise. + * config/aarch64/aarch64-builtins.cc (aarch64_simd_tuple_types): + Remove `static` qualifier. + * config/aarch64/aarch64-builtins.h (aarch64_simd_tuple_types): + New declaration. + * config/aarch64/aarch64-neon-builtins-base.cc (build_tuple_get, + build_tuple_set): New functions. (class gimple_permute, class gimple_permute_pair): New classes. - (ext_mask, rev_mask, trn_mask, uzp_mask, zip_mask): New functions. - (vext, vextq, vrev16, vrev16q, vrev32, vrev32q, vtrn1, vtrn1q, btrn2, vtrn2q, vtrn, vtrnq, - vuzp1, vuzp1q, vuzp2, vuzp2q, vuzp, vuzpq, vzip1, vzip1q, vzip2, vzip2q, vzip, vzipq): New - function bases. - * config/aarch64/aarch64-neon-builtins-base.def (vext, vextq, vrev16, vrev16q, vrev32, - vrev32q, vrev64, vrev64q, vtrn, vtrn1, vtrn1q, vtrn2, vtrn2q, vtrnq, vuzp, vuzp1, vuzp1q, - vuzp2, vuzp2q, vuzpq, vzip, vzip1, vzip1q, vzip2, vzip2q, vzipq): New function groups. - * config/aarch64/aarch64-simd-builtins.def (zip1, zip2, uzp1, uzp2, trn1, trn2): Delete - builtin functions. - * config/aarch64/arm_neon.h (vext_f16, vext_f32, vext_f64, vext_p8, vext_p16, vext_p64, - vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32, vext_u64, vextq_f16, - vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_p64, vextq_s8, vextq_s16, vextq_s32, - vextq_s64, vextq_u8, vextq_u16, vextq_u32, vextq_u64, vrev16_p8, vrev16_s8, vrev16_u8, - vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8, vrev32_s16, vrev32_u8, - vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8, vrev32q_s16, vrev32q_u8, vrev32q_u16, - vrev64_f16, vrev64_f32, vrev64_p8, vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, - vrev64_u16, vrev64_u32, vrev64q_f16, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8, - vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32, vtrn1_f16, vtrn1_f32, - vtrn1_p8, vtrn1_p16, vtrn1_s8, vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, - vtrn1q_f16, vtrn1q_f32, vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, - vtrn1q_s32, vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_p64, vtrn1q_u64, - vtrn2_f16, vtrn2_f32, vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8, - vtrn2_u16, vtrn2_u32, vtrn2q_f16, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16, vtrn2q_s8, - vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16, vtrn2q_u32, vtrn2q_u64, - vtrn2q_p64, vtrn_f16, vtrn_f32, vtrn_p8, vtrn_p16, vtrn_s8, vtrn_s16, vtrn_s32, vtrn_u8, - vtrn_u16, vtrn_u32, vtrnq_f16, vtrnq_f32, vtrnq_p8, vtrnq_p16, vtrnq_s8, vtrnq_s16, - vtrnq_s32, vtrnq_u8, vtrnq_u16, vtrnq_u32, vuzp1_f16, vuzp1_f32, vuzp1_p8, vuzp1_p16, - vuzp1_s8, vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f16, vuzp1q_f32, - vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32, vuzp1q_s64, vuzp1q_u8, - vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp1q_p64, vuzp2_f16, vuzp2_f32, vuzp2_p8, vuzp2_p16, - vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8, vuzp2_u16, vuzp2_u32, vuzp2q_f16, vuzp2q_f32, - vuzp2q_f64, vuzp2q_p8, vuzp2q_p16, vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, - vuzp2q_u16, vuzp2q_u32, vuzp2q_u64, vuzp2q_p64, vzip1_f16, vzip1_f32, vzip1_p8, vzip1_p16, - vzip1_s8, vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f16, vzip1q_f32, - vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32, vzip1q_s64, vzip1q_u8, - vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip1q_p64, vzip2_f16, vzip2_f32, vzip2_p8, vzip2_p16, - vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8, vzip2_u16, vzip2_u32, vzip2q_f16, vzip2q_f32, - vzip2q_f64, vzip2q_p8, vzip2q_p16, vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, - vzip2q_u16, vzip2q_u32, vzip2q_u64, vzip2q_p64): Delete functions. + (ext_mask, rev_mask, trn_mask, uzp_mask, zip_mask): New + functions. + (vext, vextq, vrev16, vrev16q, vrev32, vrev32q, vtrn1, vtrn1q, + btrn2, vtrn2q, vtrn, vtrnq, vuzp1, vuzp1q, vuzp2, vuzp2q, vuzp, + vuzpq, vzip1, vzip1q, vzip2, vzip2q, vzip, vzipq): New function + bases. + * config/aarch64/aarch64-neon-builtins-base.def (vext, vextq, + vrev16, vrev16q, vrev32, vrev32q, vrev64, vrev64q, vtrn, + vtrn1, vtrn1q, vtrn2, vtrn2q, vtrnq, vuzp, vuzp1, vuzp1q, + vuzp2, vuzp2q, vuzpq, vzip, vzip1, vzip1q, vzip2, vzip2q, + vzipq): New function groups. + * config/aarch64/aarch64-simd-builtins.def (zip1, zip2, uzp1, + uzp2, trn1, trn2): Delete builtin functions. + * config/aarch64/arm_neon.h (vext_f16, vext_f32, vext_f64, + vext_p8, vext_p16, vext_p64, vext_s8, vext_s16, vext_s32, + vext_s64, vext_u8, vext_u16, vext_u32, vext_u64, vextq_f16, + vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_p64, + vextq_s8, vextq_s16, vextq_s32, vextq_s64, vextq_u8, + vextq_u16, vextq_u32, vextq_u64, vrev16_p8, vrev16_s8, + vrev16_u8, vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, + vrev32_p16, vrev32_s8, vrev32_s16, vrev32_u8, vrev32_u16, + vrev32q_p8, vrev32q_p16, vrev32q_s8, vrev32q_s16, vrev32q_u8, + vrev32q_u16, vrev64_f16, vrev64_f32, vrev64_p8, vrev64_p16, + vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16, + vrev64_u32, vrev64q_f16, vrev64q_f32, vrev64q_p8, vrev64q_p16, + vrev64q_s8, vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, + vrev64q_u32, vtrn1_f16, vtrn1_f32, vtrn1_p8, vtrn1_p16, + vtrn1_s8, vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, + vtrn1_u32, vtrn1q_f16, vtrn1q_f32, vtrn1q_f64, vtrn1q_p8, + vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32, vtrn1q_s64, + vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_p64, vtrn1q_u64, + vtrn2_f16, vtrn2_f32, vtrn2_p8, vtrn2_p16, vtrn2_s8, + vtrn2_s16, vtrn2_s32, vtrn2_u8, vtrn2_u16, vtrn2_u32, + vtrn2q_f16, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16, + vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, + vtrn2q_u16, vtrn2q_u32, vtrn2q_u64, vtrn2q_p64, vtrn_f16, + vtrn_f32, vtrn_p8, vtrn_p16, vtrn_s8, vtrn_s16, vtrn_s32, + vtrn_u8, vtrn_u16, vtrn_u32, vtrnq_f16, vtrnq_f32, vtrnq_p8, + vtrnq_p16, vtrnq_s8, vtrnq_s16, vtrnq_s32, vtrnq_u8, + vtrnq_u16, vtrnq_u32, vuzp1_f16, vuzp1_f32, vuzp1_p8, + vuzp1_p16, vuzp1_s8, vuzp1_s16, vuzp1_s32, vuzp1_u8, + vuzp1_u16, vuzp1_u32, vuzp1q_f16, vuzp1q_f32, vuzp1q_f64, + vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32, + vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, + vuzp1q_p64, vuzp2_f16, vuzp2_f32, vuzp2_p8, vuzp2_p16, + vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8, vuzp2_u16, + vuzp2_u32, vuzp2q_f16, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, + vuzp2q_p16, vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, + vuzp2q_u8, vuzp2q_u16, vuzp2q_u32, vuzp2q_u64, vuzp2q_p64, + vzip1_f16, vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8, + vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, + vzip1q_f16, vzip1q_f32, vzip1q_f64, vzip1q_p8, vzip1q_p16, + vzip1q_s8, vzip1q_s16, vzip1q_s32, vzip1q_s64, vzip1q_u8, + vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip1q_p64, vzip2_f16, + vzip2_f32, vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, + vzip2_s32, vzip2_u8, vzip2_u16, vzip2_u32, vzip2q_f16, + vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16, vzip2q_s8, + vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16, + vzip2q_u32, vzip2q_u64, vzip2q_p64): Delete functions. gcc/testsuite/ChangeLog: 7: 2ba74dce304d ! 6: 20186babc487 aarch64: Port NEON reinterpret intrinsics to pragma-based framework @@ Commit message gcc/ChangeLog: - * config/aarch64/aarch64-acle-builtins.h (TYPES_neon_reinterpret1, TYPES_neon_reinterpret, - TYPES_neon_reinterpretq1, TYPES_neon_reinterpretq, neon_reinterpret, neon_reinterpretq): - New type lists. - * config/aarch64/aarch64-builtins.cc (VREINTERPRET_BUILTIN2, VREINTERPRET_BUILTINS1, - VREINTERPRET_BUILTINS, VREINTERPRETQ_BUILTIN2, VREINTERPRETQ_BUILTINS1, + * config/aarch64/aarch64-acle-builtins.h + (TYPES_neon_reinterpret1, TYPES_neon_reinterpret, + TYPES_neon_reinterpretq1, TYPES_neon_reinterpretq, + neon_reinterpret, neon_reinterpretq): New type lists. + * config/aarch64/aarch64-builtins.cc (VREINTERPRET_BUILTIN2, + VREINTERPRET_BUILTINS1, VREINTERPRET_BUILTINS, + VREINTERPRETQ_BUILTIN2, VREINTERPRETQ_BUILTINS1, VREINTERPRETQ_BUILTINS, VREINTERPRET_BUILTIN): Delete macros. (AARCH64_SIMD_VREINTERPRET_BUILTINS): Delete enum member. (aarch64_init_simd_intrinsics): Delete function. - (init_arm_neon_builtins): Delete call to `aarch64_init_simd_intrinsics`. - (aarch64_general_fold_builtin): Delete case for `AARCH64_SIMD_VREINTERPRET_BUILTINS`. - * config/aarch64/aarch64-neon-builtins-base.cc (struct gimple_reinterpret): New struct. + (init_arm_neon_builtins): Delete call to + `aarch64_init_simd_intrinsics`. + (aarch64_general_fold_builtin): Delete case for + `AARCH64_SIMD_VREINTERPRET_BUILTINS`. + * config/aarch64/aarch64-neon-builtins-base.cc (struct + gimple_reinterpret): New struct. (vreinterpret, vreinterpretq): New function bases. - * config/aarch64/aarch64-neon-builtins-base.def (vreinterpret, vreinterpretq): New function - groups. + * config/aarch64/aarch64-neon-builtins-base.def (vreinterpret, + vreinterpretq): New function groups. gcc/testsuite/ChangeLog: -- 2.54.0
