There was a patch of mine here from over an year ago:
http://gcc.gnu.org/ml/gcc-patches/2011-01/msg01846.html
That old patch contained a constraint modification that was a point of
discussion at the time, but upon re-testing I found it was unneeded for
fixing the PR (don't remember why I included it)
Resubmitting the patch adapted, basically a single-liner adding
CORE_REGS to the preferred reload class under Thumb-1. Cross-tested
with no regressions under "-march=armv5te -mthumb". Okay for trunk?
Thanks,
Chung-Lin
2012-09-26 Chung-Lin Tang <[email protected]>
PR target/44557
* config/arm/arm.c (arm_preferred_reload_class): Add CORE_REGS
to Thumb-1 case.
testsuite/
PR target/44557
* gcc.target/arm/pr44557.c: New test.
Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c (revision 191753)
+++ config/arm/arm.c (working copy)
@@ -6254,6 +6254,7 @@ arm_preferred_reload_class (rtx x ATTRIBUTE_UNUSED
else
{
if (rclass == GENERAL_REGS
+ || rclass == CORE_REGS
|| rclass == HI_REGS
|| rclass == NO_REGS
|| rclass == STACK_REG)
Index: testsuite/gcc.target/arm/pr44557.c
===================================================================
--- testsuite/gcc.target/arm/pr44557.c (revision 0)
+++ testsuite/gcc.target/arm/pr44557.c (revision 0)
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-mthumb -O1 -march=armv5te -fno-omit-frame-pointer
-fno-forward-propagate" } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+
+struct S
+{
+ short x, y;
+};
+
+void foo (struct S *p, struct S *q, char *t, int n)
+{
+ struct S *c, d;
+ int x = 1;
+
+ while (n--)
+ {
+ if (*t && p)
+ c = p;
+ q->x = d.x + c->x + c->y;
+ if (x)
+ {
+ x = 0;
+ d.x += c->x;
+ }
+ }
+}