> That's not true for all cores. SiFive cores are implemented as `Olvt`, so > VL=1 results in the same latency for both LMUL=1 and LMUL=8. > > I am not opposed to adding this as a new parameter, but I do oppose making it > the default. It should be disabled by default and enabled only for cores whose > owners explicitly confirm that this model is appropriate.
Yes, you are right. In this patch, I used a `vl_dependent_lmul_scaling` tune parameter, which is only set to false for some of our relevant models. Thus, the default behavior of other cores like SiFive cores should not be affected. We can switch to using the Ovlt arch once that's approved.
