On Fri, May 22, 2026 at 3:41 PM Richard Sandiford <[email protected]> wrote: > > "H.J. Lu" <[email protected]> writes: > > Since flow_active_insn_p has: > > > > if ((GET_CODE (PATTERN (insn)) == CLOBBER > > || GET_CODE (PATTERN (insn)) == USE) > > && REG_P (XEXP (PATTERN (insn), 0)) > > && REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0))) > > return true; > > > > update DCE to always keep return value clobber. > > > > Adjust assembly scan in gcc.target/i386/zero-scratch-regs-30.c to also > > expect 8 "fstp %st(0)" in 64-bit mode for extra insns: > > > > flds .LC2(%rip) // +QNaN > > flds .LC2(%rip) // +QNaN > > fstp %st(0) > > fstp %st(0) > > > > since return value clobber: > > > > (insn 10 2 11 2 (clobber (reg/i:XC 8 st)) "zero-scratch-regs-30.c":7:1 -1 > > (nil)) > > > > is no longer removed as without -fzero-call-used-regs=all. > > > > PR rtl-optimization/125375 > > * dce.cc: (deletable_insn_p): Always keep return value clobber. > > We shouldn't need to keep the clobber for correctness. It's just > supposed to be an optimisation crutch to prevent the return register > from becoming unnecessarily upwards exposed. > > I think there's a deeper issue here.
Any ideas about what the deeper issue is? > Richard > > > > > gcc/testsuite/ > > > > PR rtl-optimization/125375 > > * gcc.target/i386/pr125375.c: New test. > > * gcc.target/i386/zero-scratch-regs-30.c: Also expect 8 > > "fstp %st(0)" in 64-bit mode. > > > > Signed-off-by: H.J. Lu <[email protected]> > > Co-Developed-by: Andrew Pinski <[email protected]> -- H.J.
