On 5/19/26 17:34, oltolm wrote:
On x86_64 Windows targets using MS ABI, GCC classified 256-bit and 512-bit vector returns as memory returns. That caused hidden sret pointer returns where YMM0/ZMM0 returns are expected.Teach MS ABI return classification to keep 32-byte and 64-byte vector returns in registers when AVX/AVX512F is enabled, matching the return register selection path. Also extend function_value_ms_64 so 32-byte and 64-byte eligible vector returns are mapped to the SSE register class (YMM0/ZMM0 lanes). Add tests for x86_64-*-mingw* that verify 256-bit and 512-bit vector returns use YMM0/ZMM0 codegen. PR target/89597 * config/i386/i386.cc (function_value_ms_64): Handle 32-byte and 64-byte vector returns in registers when supported. (ix86_return_in_memory): Do not force 32-byte/64-byte eligible vector returns to memory for MS ABI. * testsuite/gcc.target/i386/pr89597-1.c: New test. * testsuite/gcc.target/i386/pr89597-2.c: New test.
Can you please check against x86_64 linux to make sure it doesn't cause issues? Just make sure the test results are similar with and without the change. Thanks.
