Tamar's recent change to elide vectorized loop epilogues compromised the
scan-asm part of this test for RISC-V. Essentially the test is looking
for a specific insn that appears in the unnecessary epilogue.
The original motivation for these tests was an ICE. So I'm just
dropping the scan-asm parts of this test so that we still verify that
we're not triggering an ICE. Pushing to the trunk.
Jeff
commit 2bc55e266774c3bb87527d932cf5a4b35f8bd8fd
Author: Jeff Law <[email protected]>
Date: Wed May 27 20:00:34 2026 -0600
[RISC-V] Drop compromised scan-asm test after recent vectorized loop
epilogue changes
Tamar's recent change to elide vectorized loop epilogues compromised the
scan-asm part of this test for RISC-V. Essentially the test is looking for
a
specific insn that appears in the unnecessary epilogue.
The original motivation for these tests was an ICE. So I'm just dropping
the
scan-asm parts of this test so that we still verify that we're not
triggering
an ICE.
gcc/testsuite
* gcc.target/riscv/rvv/base/pr115456-3.c: Drop compromised scan-asm
part of the test.
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr115456-3.c
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr115456-3.c
index 2c54f1d7538..276e171aaec 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr115456-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr115456-3.c
@@ -28,4 +28,3 @@ main (void)
}
/* { dg-final { scan-assembler-not {call\s+__extendhfsf2} } } */
-/* { dg-final { scan-assembler-times {vfmv\.f\.s\s+fa[0-9]+,\s*v[0-9]+} 4 } }
*/
