> From: [email protected] <[email protected]> > Sent: Thursday, May 28, 2026 7:47 PM >
I took a fast glance on all occurrences, two comments: > diff --git a/gcc/config/i386/btver2.md b/gcc/config/i386/btver2.md > index 93522d59c54..6debbc33aa5 100644 > --- a/gcc/config/i386/btver2.md > +++ b/gcc/config/i386/btver2.md > @@ -18,11 +18,11 @@ > > ;; AMD btver2 scheduling > > -;; Instructions decoded are that are classifed as direct (fast path single), > +;; Instructions decoded are that are classified as direct (fast path single), > ;; double (fast path double) and vector instructions. > -;; Direct instrucions are decoded and convereted into 1 cop > -;; Double instrucions are decoded and converetd into 2 cops > -;; Vector instrucions are microcoded and they generated converted to > +;; Direct instructions are decoded and converted into 1 cop > +;; Double instructions are decoded and converetd into 2 cops ... converted ... > diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def > index 04036ff04b5..c184d88d5cb 100644 > --- a/gcc/config/i386/x86-tune.def > +++ b/gcc/config/i386/x86-tune.def > @@ -159,7 +159,7 @@ DEF_TUNE (X86_TUNE_FUSE_MOV_AND_ALU, > "fuse_mov_and_alu", > > /* X86_TUNE_FUSE_AND_BRANCH_MEM: Fuse alu with a subsequent > conditional > jump instruction when alu contains memory operand. > - TODO: Not suported by TIGERLAKE and COPERLAKE, so m_CORE_AVX2 is > wrong. */ > + TODO: Not supported by TIGERLAKE and COPERLAKE, so m_CORE_AVX2 is ... COOPERLAKE ... Thx, Haochen
