Artemiy Volkov <[email protected]> writes:
> On Mon, Jun 08, 2026 at 08:19:36AM +0100, Richard Sandiford wrote:
>> r17-899-g52d5a8870d2108 added a pattern with a nested vec_duplicate,
>> but I think those should be folded down to a single vec_duplicate.
>>
>> The later:
>>
>> if (VECTOR_MODE_P (mode)
>> && vec_duplicate_p (op, &elt)
>> && code != VEC_DUPLICATE)
>>
>> handles only scalar elements, but this rule applies to vec_duplicates
>> of vectors as well.
>>
>> A bit of scripting suggests that this was the only use of nested
>> vec_duplicates in the md files.
>>
>> This is tested by gcc.target/aarch64/sve/vec_init_5.c.
>>
>> Tested on aarch64-linux-gnu, powerpc64le-linux-gnu and x86_64-linux-gnu.
>> OK to install?
>>
>> Richard
>>
>>
>> gcc/
>> * simplify-rtx.cc (simplify_context::simplify_unary_operation_1):
>> Simplify vec_duplicates of vec_duplicates.
>> * config/aarch64/aarch64.md
>> (*aarch64_vec_duplicate_subvector<vconsv><vconq><mode>): Remove
>> nested vec_duplicate.
>> ---
>> gcc/config/aarch64/aarch64-sve.md | 3 +--
>> gcc/simplify-rtx.cc | 6 ++++++
>> 2 files changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/gcc/config/aarch64/aarch64-sve.md
>> b/gcc/config/aarch64/aarch64-sve.md
>> index 585a587d8cf..723b8d6e6ec 100644
>> --- a/gcc/config/aarch64/aarch64-sve.md
>> +++ b/gcc/config/aarch64/aarch64-sve.md
>> @@ -2895,8 +2895,7 @@
>> (define_insn "*aarch64_vec_duplicate_subvector<vconsv><vconq><mode>"
>> [(set (match_operand:<VCONSV> 0 "register_operand")
>> (vec_duplicate:<VCONSV>
>> - (vec_duplicate:<VCONQ>
>> - (match_operand:VQDUP 1 "register_operand"))))]
>> + (match_operand:VQDUP 1 "register_operand")))]
>
> Hi Richard,
>
> With this change, the "<vconq>" part of the pattern name becomes
> superfluous as well.
Yeah, good point. But in a sense it always was. The middle mode
was never a separate degree of freedom: it was always uniquely
determined by the inner mode.
I've pushed the attached as obvious.
Thanks,
Richard
gcc/
* config/aarch64/aarch64-sve.md
(*aarch64_vec_duplicate_subvector<vconsv><vconq><mode>): Remove
<vconq> from name.
---
gcc/config/aarch64/aarch64-sve.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64-sve.md
b/gcc/config/aarch64/aarch64-sve.md
index 723b8d6e6ec..1468ecbc45c 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -2892,7 +2892,7 @@
;; Initialize an SVE vector by duplicating a 128-bit AdvSIMD register that
;; itself contains a duplicated scalar or subvector value.
-(define_insn "*aarch64_vec_duplicate_subvector<vconsv><vconq><mode>"
+(define_insn "*aarch64_vec_duplicate_subvector<vconsv><mode>"
[(set (match_operand:<VCONSV> 0 "register_operand")
(vec_duplicate:<VCONSV>
(match_operand:VQDUP 1 "register_operand")))]
--
2.54.0
