On Oct 1, 2012, at 2:51 PM, Richard Sandiford wrote:
> ...
> E.g. for MIPS, SImode loads and stores have a displacement range of
> [-32768, 32764], but DImode loads and stores only accept [-32768, 32760].
> So the maximal displacement depends on mode, even though the instruction set
> is pretty regular.
It may be that the case doesn't arise in code GCC generates, but I don't think
that's true. The offset field is always a 2's complement 16 bit integer, hence
in the range -32768..32767. The alignment required in loading multibyte data
with aligned load/store instructions applies to the final address, not the
offset. For example, if R1 contains 1, then LD r2,32767(r1) will work.
paul
