"Hu, Lin1" <[email protected]> writes: > Any opinion on this, Richard S?
It looks good to me too FWIW. Thanks, Richard > > BRs, > Lin > > -----Original Message----- > From: Richard Biener <[email protected]> > Sent: Wednesday, June 17, 2026 5:11 PM > To: Hu, Lin1 <[email protected]> > Cc: [email protected]; [email protected] > Subject: RE: [PATCH 2/3] dojump: use simplify_expand_binop for vector boolean > mask > > On Wed, 17 Jun 2026, Hu, Lin1 wrote: > >> Thanks for the review, I hadn't considered this initially. >> >> I think we don't need to worry the question. On this path the mode is >> SCALAR_INT_MODE_P. So emit_cmp_and_jump_insns goes through >> prepare_cmp_insn (optabs.cc:4998). emit_cmp_and_jump_insns force_reg >> op0 when it's a constant (optabs.cc:4989), and prepare_cmp_insn calls >> prepare_operand on both op0 and op1 (optabs.cc:4726-4727); >> prepare_operand copies the operand into a new reg via copy_to_mode_reg >> when it doesn't match the target's cbranch predicate (optabs.cc:4834). >> So if a target requires both operands to be REG, the downstream path >> already handles it. > > Thanks for double-checking. > > Richard. > >> BRs, >> Lin >> -----Original Message----- >> From: Richard Biener <[email protected]> >> Sent: Wednesday, June 17, 2026 3:56 PM >> To: Hu, Lin1 <[email protected]> >> Cc: [email protected]; [email protected] >> Subject: RE: [PATCH 2/3] dojump: use simplify_expand_binop for vector >> boolean mask >> >> On Wed, 17 Jun 2026, Hu, Lin1 wrote: >> >> > Due to the patch modify middle-end. >> > + Richard Biener and Richard Sandiford >> >> LGTM, but please leave others the chance to chime in. I think the >> current code ensures op0 and op1 are a REG_P and >> emit_cmp_and_jump_insns might not be able to force_reg if the target >> requires? >> >> > Thanks. >> > >> > BRs, >> > Lin >> > >> > -----Original Message----- >> > From: Hu, Lin1 <[email protected]> >> > Sent: Friday, June 5, 2026 2:26 PM >> > To: [email protected] >> > Cc: Liu, Hongtao <[email protected]>; [email protected] >> > Subject: [PATCH 2/3] dojump: use simplify_expand_binop for vector >> > boolean mask >> > >> > When either op0 or op1 is a constant, expand_binop can emit an extra AND >> > during expansion. Use simplify_expand_binop here to avoid creating it in >> > the first place. >> > >> > gcc/ChangeLog: >> > >> > * dojump.cc (do_compare_rtx_and_jump): Use simplify_expand_binop >> > instead of expand_binop. >> > --- >> > gcc/dojump.cc | 11 +++++------ >> > 1 file changed, 5 insertions(+), 6 deletions(-) >> > >> > diff --git a/gcc/dojump.cc b/gcc/dojump.cc index >> > 599a546b0de..1ed22116a27 100644 >> > --- a/gcc/dojump.cc >> > +++ b/gcc/dojump.cc >> > @@ -1244,12 +1244,11 @@ do_compare_rtx_and_jump (rtx op0, rtx op1, enum >> > rtx_code code, int unsignedp, >> > auto nunits = TYPE_VECTOR_SUBPARTS (TREE_TYPE (val)).to_constant (); >> > if (maybe_ne (GET_MODE_PRECISION (mode), nunits)) >> > { >> > - op0 = expand_binop (mode, and_optab, op0, >> > - GEN_INT ((HOST_WIDE_INT_1U << nunits) - 1), >> > - NULL_RTX, true, OPTAB_WIDEN); >> > - op1 = expand_binop (mode, and_optab, op1, >> > - GEN_INT ((HOST_WIDE_INT_1U << nunits) - 1), >> > - NULL_RTX, true, OPTAB_WIDEN); >> > + rtx mask_imm = GEN_INT ((HOST_WIDE_INT_1U << nunits) - 1); >> > + op0 = simplify_expand_binop (mode, and_optab, op0, mask_imm, >> > + NULL_RTX, true, OPTAB_WIDEN); >> > + op1 = simplify_expand_binop (mode, and_optab, op1, mask_imm, >> > + NULL_RTX, true, OPTAB_WIDEN); >> > } >> > } >> > >> > -- >> > 2.31.1 >> > >> > >> >> -- >> Richard Biener <[email protected]> >> SUSE Software Solutions Germany GmbH, >> Frankenstrasse 146, 90461 Nuernberg, Germany; >> GF: Jochen Jaser, Andrew McDonald, Werner Knoblich; (HRB 36809, AG >> Nuernberg) >> > > -- > Richard Biener <[email protected]> > SUSE Software Solutions Germany GmbH, > Frankenstrasse 146, 90461 Nuernberg, Germany; > GF: Jochen Jaser, Andrew McDonald, Werner Knoblich; (HRB 36809, AG Nuernberg)
