The PR reports a failure on -m32 that I can't seem to reproduce on my x86_64 machine..
However cvise (I gave the compiler as many flags I
could think of to prevent this) did give me a
reproducer that has some UB in it wrt to signed
shifts on 32-bit systems.
So this fixed the UBs and hopefully that fixes
the reported failure.
Bootstrapped Regtested on aarch64-none-linux-gnu,
arm-none-linux-gnueabihf, x86_64-pc-linux-gnu
-m32, -m64 and no issues.
Pushed to master.
Thanks,
Tamar
gcc/testsuite/ChangeLog:
PR testsuite/125871
* gcc.dg/vect/vect-early-break_144-pr125804.c: New test.
-- inline copy of patch --
diff --git a/gcc/testsuite/gcc.dg/vect/vect-early-break_144-pr125804.c
b/gcc/testsuite/gcc.dg/vect/vect-early-break_144-pr125804.c
index
f8974023ee6a3216042b8656a14f1ac42be32a94..d8deb733f70e742db0a1eba24a63e95c335f3623
100644
--- a/gcc/testsuite/gcc.dg/vect/vect-early-break_144-pr125804.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-early-break_144-pr125804.c
@@ -21,11 +21,11 @@ int g;
__attribute__((noipa))
int h(bitmap i) {
c j = *i->d;
- unsigned k, l = j.b < 4;
+ unsigned k = 0, l = j.b < 4;
for (; l < 2; l++) {
long long m = j.bits[l];
for (; k < 64; k++) {
- long long n = (long long)1LL << k;
+ long long n = (long long)(1ull << k);
if (m & n)
goto o;
}
@@ -40,8 +40,8 @@ int main() {
check_vect ();
- c a;
- a.bits[0] = 1ull << 63;
+ c a = { 4, { 0, 0 } };
+ a.bits[0] = -0x7fffffffffffffffLL - 1;
f.d = &a;
g = h(&f);
return g == 0;
rb20638.patch
Description: rb20638.patch
