Hi gcc-patches mailing list, Karl Meakin via Sourceware Forge <[email protected]> has requested that the following forgejo pull request be published on the mailing list.
Created on: 2026-05-13 15:39:36+00:00 Latest update: 2026-06-23 08:40:57+00:00 Changes: 115 changed files, 20785 additions, 16875 deletions Head revision: karmea01/gcc-TEST ref dsg/karmea01/neon-port commit 2049e626f4b57856f1011aa307a75060c3e22d05 Base revision: gcc/gcc-TEST ref trunk commit 52f6d04426193315872e07b7e5ed5c1e84e1e411 r17-1653-g52f6d044261933 Merge base: 52f6d04426193315872e07b7e5ed5c1e84e1e411 Full diff url: https://forge.sourceware.org/gcc/gcc-TEST/pulls/158.diff Discussion: https://forge.sourceware.org/gcc/gcc-TEST/pulls/158 Requested Reviewers: pinskia, rdfm, tnfchris This patch is a proof of concept patch which ports a few NEON intrinsics (intrinsics defined in `arm_neon.h`) to the "pragma-based" framework used by SVE/SME intrinsics. If successful, I will follow up with further patches porting the rest. tested with `make check` changelog: * v1: Initial revision * v2: Appease `check_GNU_style.py` * v3: Drop unrelated `.editorconfig` changes which were included by mistake * v4: * Address review comments * Move reformatting of `config.gcc` into its own commit. * Merge `aarch64-neon-builtins.cc` into `aarch64-sve-builtins.cc` and rename it to `aarch64-acle-builtins.cc` * v5: Fix codegen for big-endian targets * v6 Improve codegen for `FEAT_SHA3` intrinsics (`veor3`, `vbcax`, `vrax1` and `vxar`) at `-O0`. * v7 Delete `aarch64-neon-builtins.cc` again after it somehow got reintroduced in v6 * v8 Remove RFC tag, rebase against master * v9 Use the new `IFN_BITREVERSE` when lowering `rbit` Changed files: - A: gcc/config/aarch64/aarch64-acle-builtins.cc - A: gcc/config/aarch64/aarch64-acle-builtins.h - A: gcc/config/aarch64/aarch64-neon-builtins-base.cc - A: gcc/config/aarch64/aarch64-neon-builtins-base.def - A: gcc/config/aarch64/aarch64-neon-builtins-base.h - A: gcc/config/aarch64/aarch64-neon-builtins-functions.h - A: gcc/config/aarch64/aarch64-neon-builtins-shapes.cc - A: gcc/config/aarch64/aarch64-neon-builtins-shapes.h - A: gcc/config/aarch64/aarch64-neon-builtins.def - A: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_indices.c - A: gcc/testsuite/gcc.target/aarch64/neon/aarch64-neon.exp - A: gcc/testsuite/gcc.target/aarch64/neon/arm_neon_test.h - A: gcc/testsuite/gcc.target/aarch64/neon/vadd.c - A: gcc/testsuite/gcc.target/aarch64/neon/vand.c - A: gcc/testsuite/gcc.target/aarch64/neon/vbcax.c - A: gcc/testsuite/gcc.target/aarch64/neon/vbic.c - A: gcc/testsuite/gcc.target/aarch64/neon/vbsl.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcls.c - A: gcc/testsuite/gcc.target/aarch64/neon/vclz.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcnt.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcombine.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcopy_lane.c - A: gcc/testsuite/gcc.target/aarch64/neon/vcreate.c - A: gcc/testsuite/gcc.target/aarch64/neon/vdup.c - A: gcc/testsuite/gcc.target/aarch64/neon/vdup_lane.c - A: gcc/testsuite/gcc.target/aarch64/neon/veor.c - A: gcc/testsuite/gcc.target/aarch64/neon/veor3.c - A: gcc/testsuite/gcc.target/aarch64/neon/vext.c - A: gcc/testsuite/gcc.target/aarch64/neon/vget_high.c - A: gcc/testsuite/gcc.target/aarch64/neon/vget_lane.c - A: gcc/testsuite/gcc.target/aarch64/neon/vget_low.c - A: gcc/testsuite/gcc.target/aarch64/neon/vmov_n.c - A: gcc/testsuite/gcc.target/aarch64/neon/vmvn.c - A: gcc/testsuite/gcc.target/aarch64/neon/vorn.c - A: gcc/testsuite/gcc.target/aarch64/neon/vorr.c - A: gcc/testsuite/gcc.target/aarch64/neon/vrax1.c - A: gcc/testsuite/gcc.target/aarch64/neon/vrbit.c - A: gcc/testsuite/gcc.target/aarch64/neon/vreinterpret.c - A: gcc/testsuite/gcc.target/aarch64/neon/vrev.c - A: gcc/testsuite/gcc.target/aarch64/neon/vset_lane.c - A: gcc/testsuite/gcc.target/aarch64/neon/vtrn.c - A: gcc/testsuite/gcc.target/aarch64/neon/vuzp.c - A: gcc/testsuite/gcc.target/aarch64/neon/vxar.c - A: gcc/testsuite/gcc.target/aarch64/neon/vzip.c - A: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_indices.c - D: gcc/config/aarch64/aarch64-sve-builtins.cc - D: gcc/config/aarch64/aarch64-sve-builtins.h - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s8_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u16_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u32_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u64_indices_1.c - D: gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u8_indices_1.c - M: gcc/config.gcc - M: gcc/config/aarch64/aarch64-builtins.cc - M: gcc/config/aarch64/aarch64-builtins.h - M: gcc/config/aarch64/aarch64-c.cc - M: gcc/config/aarch64/aarch64-protos.h - M: gcc/config/aarch64/aarch64-simd-builtins.def - M: gcc/config/aarch64/aarch64-simd-pragma-builtins.def - M: gcc/config/aarch64/aarch64-simd.md - M: gcc/config/aarch64/aarch64-sve-builtins-base.cc - M: gcc/config/aarch64/aarch64-sve-builtins-base.h - M: gcc/config/aarch64/aarch64-sve-builtins-functions.h - M: gcc/config/aarch64/aarch64-sve-builtins-shapes.cc - M: gcc/config/aarch64/aarch64-sve-builtins-shapes.h - M: gcc/config/aarch64/aarch64-sve-builtins-sme.cc - M: gcc/config/aarch64/aarch64-sve-builtins-sme.h - M: gcc/config/aarch64/aarch64-sve-builtins-sve2.cc - M: gcc/config/aarch64/aarch64-sve-builtins-sve2.h - M: gcc/config/aarch64/aarch64-sve-builtins.def - M: gcc/config/aarch64/aarch64.cc - M: gcc/config/aarch64/aarch64.md - M: gcc/config/aarch64/arm_neon.h - M: gcc/config/aarch64/iterators.md - M: gcc/config/aarch64/t-aarch64 - M: gcc/testsuite/g++.target/aarch64/lane-bound-1.C - M: gcc/testsuite/g++.target/aarch64/pr103147-6.C - M: gcc/testsuite/g++.target/aarch64/pr117048.C - M: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c - M: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c - M: gcc/testsuite/gcc.target/aarch64/lane-bound-3.c - M: gcc/testsuite/gcc.target/aarch64/pr103147-6.c - M: gcc/testsuite/gcc.target/aarch64/pr113573.c - M: gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_6.c - M: gcc/testsuite/gcc.target/aarch64/simd/mf8_data_2.c - M: gcc/testsuite/gcc.target/aarch64/simd/vset_lane_s16_const_1.c - M: gcc/testsuite/gcc.target/aarch64/sme/inlining_10.c - M: gcc/testsuite/gcc.target/aarch64/sme/inlining_11.c - M: gcc/testsuite/gcc.target/aarch64/target_attr_10.c - M: gcc/testsuite/gcc.target/aarch64/vmov_n_1.c Karl Meakin (7): aarch64: Reformat `config.gcc` aarch64: Rename `aarch64-sve-builtins` to `aarch64-acle-builtins` aarch64: Port NEON add intrinsics to pragma-based framework aarch64: Port NEON vector manipulation intrinsics to pragma-based framework aarch64: Port NEON bit manipulation intrinsics to pragma-based framework aarch64: Port NEON permutation intrinsics to pragma-based framework aarch64: Port NEON reinterpret intrinsics to pragma-based framework gcc/config.gcc | 40 +- ...e-builtins.cc => aarch64-acle-builtins.cc} | 959 +- ...sve-builtins.h => aarch64-acle-builtins.h} | 1005 +- gcc/config/aarch64/aarch64-builtins.cc | 547 +- gcc/config/aarch64/aarch64-builtins.h | 1 + gcc/config/aarch64/aarch64-c.cc | 17 +- .../aarch64/aarch64-neon-builtins-base.cc | 833 + .../aarch64/aarch64-neon-builtins-base.def | 147 + .../aarch64/aarch64-neon-builtins-base.h | 29 + .../aarch64/aarch64-neon-builtins-functions.h | 29 + .../aarch64/aarch64-neon-builtins-shapes.cc | 132 + .../aarch64/aarch64-neon-builtins-shapes.h | 29 + gcc/config/aarch64/aarch64-neon-builtins.def | 40 + gcc/config/aarch64/aarch64-protos.h | 5 +- gcc/config/aarch64/aarch64-simd-builtins.def | 36 - .../aarch64/aarch64-simd-pragma-builtins.def | 105 - gcc/config/aarch64/aarch64-simd.md | 21 +- .../aarch64/aarch64-sve-builtins-base.cc | 16 +- .../aarch64/aarch64-sve-builtins-base.h | 2 +- .../aarch64/aarch64-sve-builtins-functions.h | 2 +- .../aarch64/aarch64-sve-builtins-shapes.cc | 47 +- .../aarch64/aarch64-sve-builtins-shapes.h | 2 +- .../aarch64/aarch64-sve-builtins-sme.cc | 8 +- gcc/config/aarch64/aarch64-sve-builtins-sme.h | 2 +- .../aarch64/aarch64-sve-builtins-sve2.cc | 8 +- .../aarch64/aarch64-sve-builtins-sve2.h | 2 +- gcc/config/aarch64/aarch64-sve-builtins.def | 11 + gcc/config/aarch64/aarch64.cc | 40 +- gcc/config/aarch64/aarch64.md | 6 - gcc/config/aarch64/arm_neon.h | 23106 ++++++---------- gcc/config/aarch64/iterators.md | 2 +- gcc/config/aarch64/t-aarch64 | 43 +- .../g++.target/aarch64/lane-bound-1.C | 2 +- gcc/testsuite/g++.target/aarch64/pr103147-6.C | 1 + gcc/testsuite/g++.target/aarch64/pr117048.C | 2 +- .../aarch64/advsimd-intrinsics/bf16_dup.c | 7 +- .../bf16_vect_copy_lane_1.c | 3 +- .../vcopy_lane_bf16_indices_1.c | 18 - .../vcopy_lane_bf16_indices_2.c | 18 - .../advsimd-intrinsics/vcopy_lane_indices.c | 68 + .../vcopy_laneq_bf16_indices_1.c | 17 - .../vcopy_laneq_bf16_indices_2.c | 17 - .../vcopyq_lane_bf16_indices_1.c | 17 - .../vcopyq_lane_bf16_indices_2.c | 17 - .../vcopyq_laneq_bf16_indices_1.c | 17 - .../vcopyq_laneq_bf16_indices_2.c | 17 - .../gcc.target/aarch64/lane-bound-3.c | 4 +- .../gcc.target/aarch64/neon/aarch64-neon.exp | 43 + .../gcc.target/aarch64/neon/arm_neon_test.h | 24 + gcc/testsuite/gcc.target/aarch64/neon/vadd.c | 203 + gcc/testsuite/gcc.target/aarch64/neon/vand.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/vbcax.c | 60 + gcc/testsuite/gcc.target/aarch64/neon/vbic.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/vbsl.c | 214 + gcc/testsuite/gcc.target/aarch64/neon/vcls.c | 88 + gcc/testsuite/gcc.target/aarch64/neon/vclz.c | 88 + gcc/testsuite/gcc.target/aarch64/neon/vcnt.c | 25 + .../gcc.target/aarch64/neon/vcombine.c | 122 + .../gcc.target/aarch64/neon/vcopy_lane.c | 438 + .../gcc.target/aarch64/neon/vcreate.c | 119 + gcc/testsuite/gcc.target/aarch64/neon/vdup.c | 226 + .../gcc.target/aarch64/neon/vdup_lane.c | 647 + gcc/testsuite/gcc.target/aarch64/neon/veor.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/veor3.c | 60 + gcc/testsuite/gcc.target/aarch64/neon/vext.c | 216 + .../gcc.target/aarch64/neon/vget_high.c | 116 + .../gcc.target/aarch64/neon/vget_lane.c | 449 + .../gcc.target/aarch64/neon/vget_low.c | 100 + .../gcc.target/aarch64/neon/vmov_n.c | 212 + gcc/testsuite/gcc.target/aarch64/neon/vmvn.c | 102 + gcc/testsuite/gcc.target/aarch64/neon/vorn.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/vorr.c | 116 + gcc/testsuite/gcc.target/aarch64/neon/vrax1.c | 11 + gcc/testsuite/gcc.target/aarch64/neon/vrbit.c | 46 + .../gcc.target/aarch64/neon/vreinterpret.c | 3143 +++ gcc/testsuite/gcc.target/aarch64/neon/vrev.c | 311 + .../gcc.target/aarch64/neon/vset_lane.c | 234 + gcc/testsuite/gcc.target/aarch64/neon/vtrn.c | 566 + gcc/testsuite/gcc.target/aarch64/neon/vuzp.c | 566 + gcc/testsuite/gcc.target/aarch64/neon/vxar.c | 32 + gcc/testsuite/gcc.target/aarch64/neon/vzip.c | 559 + gcc/testsuite/gcc.target/aarch64/pr103147-6.c | 1 + gcc/testsuite/gcc.target/aarch64/pr113573.c | 62 +- .../aarch64/simd/fold_to_highpart_6.c | 24 +- .../gcc.target/aarch64/simd/mf8_data_2.c | 1 - .../aarch64/simd/vget_lane_f32_indices_1.c | 17 - .../aarch64/simd/vget_lane_f64_indices_1.c | 17 - .../aarch64/simd/vget_lane_indices.c | 46 + .../aarch64/simd/vget_lane_p16_indices_1.c | 17 - .../aarch64/simd/vget_lane_p8_indices_1.c | 17 - .../aarch64/simd/vget_lane_s16_indices_1.c | 17 - .../aarch64/simd/vget_lane_s32_indices_1.c | 17 - .../aarch64/simd/vget_lane_s64_indices_1.c | 17 - .../aarch64/simd/vget_lane_s8_indices_1.c | 17 - .../aarch64/simd/vget_lane_u16_indices_1.c | 17 - .../aarch64/simd/vget_lane_u32_indices_1.c | 17 - .../aarch64/simd/vget_lane_u64_indices_1.c | 17 - .../aarch64/simd/vget_lane_u8_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_f32_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_f64_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_p16_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_p8_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_s16_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_s32_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_s64_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_s8_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_u16_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_u32_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_u64_indices_1.c | 17 - .../aarch64/simd/vgetq_lane_u8_indices_1.c | 17 - .../aarch64/simd/vset_lane_s16_const_1.c | 2 +- .../gcc.target/aarch64/sme/inlining_10.c | 6 +- .../gcc.target/aarch64/sme/inlining_11.c | 7 +- .../gcc.target/aarch64/target_attr_10.c | 4 +- gcc/testsuite/gcc.target/aarch64/vmov_n_1.c | 2 +- 115 files changed, 20785 insertions(+), 16875 deletions(-) rename gcc/config/aarch64/{aarch64-sve-builtins.cc => aarch64-acle-builtins.cc} (87%) rename gcc/config/aarch64/{aarch64-sve-builtins.h => aarch64-acle-builtins.h} (59%) create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-base.cc create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-base.def create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-base.h create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-functions.h create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-shapes.cc create mode 100644 gcc/config/aarch64/aarch64-neon-builtins-shapes.h create mode 100644 gcc/config/aarch64/aarch64-neon-builtins.def delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_indices.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/aarch64-neon.exp create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/arm_neon_test.h create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vadd.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vand.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vbcax.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vbic.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vbsl.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcls.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vclz.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcnt.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcombine.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcopy_lane.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vcreate.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vdup.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vdup_lane.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/veor.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/veor3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vext.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vget_high.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vget_lane.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vget_low.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vmov_n.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vmvn.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vorn.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vorr.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrax1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrbit.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vreinterpret.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vrev.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vset_lane.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vtrn.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vuzp.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vxar.c create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vzip.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_f64_indices_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_indices.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_p8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_s8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vget_lane_u8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_f64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_p8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_s8_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u16_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u32_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u64_indices_1.c delete mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vgetq_lane_u8_indices_1.c Range-diff against v9: 1: 2de53ed99033 = 1: f2f18099b4f9 aarch64: Reformat `config.gcc` 2: ce3d5e8a8907 = 2: 0cbd0930518c aarch64: Rename `aarch64-sve-builtins` to `aarch64-acle-builtins` 3: 5fd2d96f485a ! 3: 0f15cf5c07f3 aarch64: Port NEON add intrinsics to pragma-based framework @@ gcc/config/aarch64/aarch64-neon-builtins-base.cc (new) +#include "aarch64-neon-builtins-functions.h" +#include "gimple-fold.h" + -+using namespace aarch64_acle; -+ ++namespace aarch64_acle { +/* Base class for all function expanders. + At least one of `expand` or `fold` must be overriden by derived classes. */ +class gimple_function_base : public function_base @@ gcc/config/aarch64/aarch64-neon-builtins-base.cc (new) +NEON_FUNCTION (vaddd, gimple_expr, (PLUS_EXPR)) +NEON_FUNCTION (vadd, gimple_expr, (PLUS_EXPR, PLUS_EXPR, BIT_XOR_EXPR)) +NEON_FUNCTION (vaddq, gimple_expr, (PLUS_EXPR, PLUS_EXPR, BIT_XOR_EXPR)) ++} ## gcc/config/aarch64/aarch64-neon-builtins-base.def (new) ## @@ @@ gcc/config/aarch64/aarch64-neon-builtins-base.def (new) +#undef REQUIRED_EXTENSIONS + +// Lanewise arithmetic (FP16) -+#define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_F16) ++#define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD | AARCH64_FL_F16) +DEF_NEON_FUNCTION (vadd, h_float, ("D0,D0,D0")) +DEF_NEON_FUNCTION (vaddq, h_float, ("Q0,Q0,Q0")) +#undef REQUIRED_EXTENSIONS @@ gcc/config/aarch64/t-aarch64: aarch64-builtins.o: $(srcdir)/config/aarch64/aarch aarch64-acle-builtins.o: $(srcdir)/config/aarch64/aarch64-acle-builtins.cc \ $(srcdir)/config/aarch64/aarch64-sve-builtins.def \ $(srcdir)/config/aarch64/aarch64-sve-builtins-base.def \ + $(srcdir)/config/aarch64/aarch64-sve-builtins-sve2.def \ + $(srcdir)/config/aarch64/aarch64-sve-builtins-sme.def \ ++ $(srcdir)/config/aarch64/aarch64-neon-builtins.def \ ++ $(srcdir)/config/aarch64/aarch64-neon-builtins-base.def \ + $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TARGET_H) $(TREE_H) $(RTL_H) \ + $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H) $(DIAGNOSTIC_H) \ + $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) fold-const.h $(GIMPLE_H) \ ## gcc/testsuite/g++.target/aarch64/pr103147-6.C ## @@ 4: 58f53afd068e ! 4: 10e12a9223a5 aarch64: Port NEON vector manipulation intrinsics to pragma-based framework @@ gcc/config/aarch64/aarch64-builtins.cc: aarch64_general_gimple_fold_builtin (uns ## gcc/config/aarch64/aarch64-neon-builtins-base.cc ## @@ + #include "gimple-fold.h" - using namespace aarch64_acle; - + namespace aarch64_acle { +/* Convert a lane index to the correct index for the target endianness. + For little-endian targets, this is a no-op. + For big-endian targets, this is `len - index - 1`. */ 5: 910acac94207 ! 5: 4004f922b3fc aarch64: Port NEON bit manipulation intrinsics to pragma-based framework @@ gcc/config/aarch64/aarch64-builtins.cc: aarch64_expand_pragma_builtin (tree exp, ## gcc/config/aarch64/aarch64-neon-builtins-base.cc ## @@ + #include "gimple-fold.h" - using namespace aarch64_acle; - + namespace aarch64_acle { +/* Build a cast expression, `(TYPE)EXPR`, if necessary to make an expression + with type TYPE. */ +tree @@ gcc/config/aarch64/aarch64-neon-builtins-base.cc: NEON_FUNCTION (vdupd_laneq, g +NEON_FUNCTION (vclzq, gimple_ifn, (IFN_CLZ)) +NEON_FUNCTION (vcnt, gimple_ifn, (IFN_POPCOUNT)) +NEON_FUNCTION (vcntq, gimple_ifn, (IFN_POPCOUNT)) + } ## gcc/config/aarch64/aarch64-neon-builtins-base.def ## @@ gcc/config/aarch64/aarch64-neon-builtins-base.def: DEF_NEON_FUNCTION (vaddq, bhdq_poly, ("Q0,Q0,Q0")) 6: f43d170773fe ! 6: 8818357cdbf6 aarch64: Port NEON permutation intrinsics to pragma-based framework @@ gcc/config/aarch64/aarch64-neon-builtins-base.cc: NEON_FUNCTION (vclz, gimple_i +NEON_FUNCTION (vzip2q, gimple_permute, (zip_mask<true>)) +NEON_FUNCTION (vzip, gimple_permute_pair, (zip_mask<false>, zip_mask<true>)) +NEON_FUNCTION (vzipq, gimple_permute_pair, (zip_mask<false>, zip_mask<true>)) + } ## gcc/config/aarch64/aarch64-neon-builtins-base.def ## @@ gcc/config/aarch64/aarch64-neon-builtins-base.def: DEF_NEON_FUNCTION (vclzq, bhs_integer, ("Q0,Q0")) 7: 89819c0f8fe3 = 7: 2049e626f4b5 aarch64: Port NEON reinterpret intrinsics to pragma-based framework -- 2.54.0
