AMD General

Hi Richard,

> -----Original Message-----
> From: Richard Biener <[email protected]>
> Sent: Wednesday, June 24, 2026 6:50 PM
> To: [email protected]
> Cc: [email protected]
> Subject: [PATCH] Make tree_code an enum class so we can forward declare it
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> The following changes the reassociation_width target hook to take a tree_code
> after recognizing the x86 hook compares against rtx_code PLUS.
> Like rtx_code we can now forward declare tree_code to achieve that.
>
> Bootstrap and regtest running on x86_64-unknown-linux-gnu.
>
> OK if that succeeds?
>
> Thanks,
> Richard.
>
>         * coretypes.h (enum tree_code): Declare.
>         * tree-core.h (enum tree_code): Adjust.
>         * target.def (reassociation_width): Get a tree_code instead
>         of unsigned int.
>         * genmatch.cc (enum tree_code): Adjust.
>         * config/aarch64/aarch64.cc (aarch64_reassociation_width):
>         Likewise.
>         * config/loongarch/loongarch.cc
>         (loongarch_cpu_sched_reassociation_width): Likewise.
>         * config/mips/mips.cc (mips_sched_reassociation_width): Likewise.
>         * config/rs6000/rs6000.cc (rs6000_reassociation_width): Likewise.
>         * config/i386/i386.cc (ix86_reassociation_width): Likewise
>         and fix bogus compares.
> ---
>  gcc/config/aarch64/aarch64.cc     | 2 +-
>  gcc/config/i386/i386.cc           | 6 +++---
>  gcc/config/loongarch/loongarch.cc | 5 +----
>  gcc/config/mips/mips.cc           | 2 +-
>  gcc/config/rs6000/rs6000.cc       | 2 +-
>  gcc/coretypes.h                   | 3 +++
>  gcc/genmatch.cc                   | 2 +-
>  gcc/target.def                    | 2 +-
>  gcc/tree-core.h                   | 2 +-
>  9 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> index 9dd19d81d7b..8dc3c43c812 100644
> --- a/gcc/config/aarch64/aarch64.cc
> +++ b/gcc/config/aarch64/aarch64.cc
> @@ -1528,7 +1528,7 @@ aarch64_min_divisions_for_recip_mul
> (machine_mode mode)
>
>  /* Return the reassociation width of treeop OPC with mode MODE.  */  static
> int -aarch64_reassociation_width (unsigned opc, machine_mode mode)
> +aarch64_reassociation_width (tree_code opc, machine_mode mode)
>  {
>    if (VECTOR_MODE_P (mode))
>      return aarch64_tune_params.vec_reassoc_width;
> diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index
> 33b4c13d0fa..e66958db7ac 100644
> --- a/gcc/config/i386/i386.cc
> +++ b/gcc/config/i386/i386.cc
> @@ -25842,7 +25842,7 @@ ix86_enum_va_list (int idx, const char **pname,
> tree *ptree)
>     is passed in MODE.  */
>
>  static int
> -ix86_reassociation_width (unsigned int op, machine_mode mode)
> +ix86_reassociation_width (tree_code op, machine_mode mode)
>  {
>    int width = 1;
>    /* Vector part.  */
> @@ -25865,12 +25865,12 @@ ix86_reassociation_width (unsigned int op,
> machine_mode mode)
>            || ix86_tune == PROCESSOR_C86_4G_M6
>            || ix86_tune == PROCESSOR_C86_4G_M7
>            || ix86_tune == PROCESSOR_C86_4G_M8)
> -         && INTEGRAL_MODE_P (mode) && op != PLUS && op != MINUS)
> +         && INTEGRAL_MODE_P (mode) && op != PLUS_EXPR && op !=
> + MINUS_EXPR)
>         return 1;
>        /* Znver5 can do 2 integer multiplications per cycle with latency
>          of 3.  */
>        if ((ix86_tune == PROCESSOR_ZNVER5 || ix86_tune ==
> PROCESSOR_ZNVER6)
> -         && INTEGRAL_MODE_P (mode) && op != PLUS && op != MINUS)
> +         && INTEGRAL_MODE_P (mode) && op != PLUS_EXPR && op !=
> + MINUS_EXPR)
>         width = 6;
>

Thanks for the patch.  I wanted to fix the widths for Zen6 and correct this 
check.
I will wait for this patch to be pushed.

Regards,
Venkat.

>        /* Account for targets that splits wide vectors into multiple parts.  
> */ diff --
> git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
> index 131f7b3f57b..1192c85e0f1 100644
> --- a/gcc/config/loongarch/loongarch.cc
> +++ b/gcc/config/loongarch/loongarch.cc
> @@ -9999,11 +9999,8 @@ loongarch_vectorize_vec_perm_const
> (machine_mode vmode, machine_mode op_mode,
>
>  static int
>  loongarch_cpu_sched_reassociation_width (struct loongarch_target *target,
> -                                        unsigned int opc, machine_mode mode)
> +                                        tree_code opc, machine_mode
> + mode)
>  {
> -  /* unreferenced argument */
> -  (void) opc;
> -
>    switch (target->cpu_tune)
>      {
>      case TUNE_GENERIC:
> diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc index
> 303766db522..277ec419826 100644
> --- a/gcc/config/mips/mips.cc
> +++ b/gcc/config/mips/mips.cc
> @@ -22328,7 +22328,7 @@ mips_expand_msa_reduc (rtx (*fn) (rtx, rtx, rtx), rtx
> dest, rtx in)
>  /* Implement TARGET_SCHED_REASSOCIATION_WIDTH.  */
>
>  static int
> -mips_sched_reassociation_width (unsigned int opc ATTRIBUTE_UNUSED,
> +mips_sched_reassociation_width (tree_code opc ATTRIBUTE_UNUSED,
>                                 machine_mode mode)  {
>    if (MSA_SUPPORTED_MODE_P (mode))
> diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index
> afe5d45c125..86d06cfdaa6 100644
> --- a/gcc/config/rs6000/rs6000.cc
> +++ b/gcc/config/rs6000/rs6000.cc
> @@ -10157,7 +10157,7 @@ rs6000_offsettable_memref_p (rtx op,
> machine_mode reg_mode, bool strict)  */
>
>  static int
> -rs6000_reassociation_width (unsigned int opc ATTRIBUTE_UNUSED,
> +rs6000_reassociation_width (tree_code opc ATTRIBUTE_UNUSED,
>                              machine_mode mode)  {
>    switch (rs6000_tune)
> diff --git a/gcc/coretypes.h b/gcc/coretypes.h index 61f91cd2745..5cc602ed7e5
> 100644
> --- a/gcc/coretypes.h
> +++ b/gcc/coretypes.h
> @@ -105,6 +105,9 @@ enum tree_index : unsigned;
>  /* Forward declare rtx_code, so that we can use it in target hooks without
>     needing to pull in rtl.h.  */
>  enum rtx_code : unsigned;
> +/* Forward declare tree_code, so that we can use it in target hooks without
> +   needing to pull in tree-core.h.  */
> +enum tree_code : unsigned;
>
>  /* Forward decls for leaf gimple subclasses (for individual gimple codes).
>     Keep this in the same order as the corresponding codes in gimple.def.  */ 
> diff
> --git a/gcc/genmatch.cc b/gcc/genmatch.cc index 8ee7ae66e46..920cf27877d
> 100644
> --- a/gcc/genmatch.cc
> +++ b/gcc/genmatch.cc
> @@ -999,7 +999,7 @@ choose_output (const vec<FILE *> &parts)
>     definition files.  */
>
>  #define DEFTREECODE(SYM, STRING, TYPE, NARGS)   SYM,
> -enum tree_code {
> +enum tree_code : unsigned {
>  #include "tree.def"
>  MAX_TREE_CODES
>  };
> diff --git a/gcc/target.def b/gcc/target.def index 89788a26986..3f28768fdf0
> 100644
> --- a/gcc/target.def
> +++ b/gcc/target.def
> @@ -1535,7 +1535,7 @@ DEFHOOK
>  (reassociation_width,
>  "This hook is called by tree reassociator to determine a level of\n\  
> parallelism
> required in output calculations chain.", -int, (unsigned int opc, machine_mode
> mode),
> +int, (tree_code opc, machine_mode mode),
>  hook_int_uint_mode_1)
>
>  /* The following member value is a function that returns priority for diff 
> --git
> a/gcc/tree-core.h b/gcc/tree-core.h index 09c07c5c129..6992a5acf81 100644
> --- a/gcc/tree-core.h
> +++ b/gcc/tree-core.h
> @@ -151,7 +151,7 @@ struct die_struct;
>  #define DEFTREECODE(SYM, STRING, TYPE, NARGS)   SYM,
>  #define END_OF_BASE_TREE_CODES LAST_AND_UNUSED_TREE_CODE,
>
> -enum tree_code {
> +enum tree_code : unsigned {
>  #include "all-tree.def"
>  MAX_TREE_CODES
>  };
> --
> 2.51.0

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